Search

Alexander O Williams

Examiner (ID: 12148, Phone: (571)272-1924 , Office: P/2826 )

Most Active Art Unit
2826
Art Unit(s)
2826, 2811, 2508
Total Applications
2764
Issued Applications
2318
Pending Applications
64
Abandoned Applications
383

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17933348 [patent_doc_number] => 20220328474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => 3D SEMICONDUCTOR DEVICES AND STRUCTURES WITH METAL LAYERS [patent_app_type] => utility [patent_app_number] => 17/827705 [patent_app_country] => US [patent_app_date] => 2022-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25561 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17827705 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/827705
3D semiconductor devices and structures with metal layers May 27, 2022 Issued
Array ( [id] => 17310246 [patent_doc_number] => 11211373 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-12-28 [patent_title] => Double-sided chip stack assembly [patent_app_type] => utility [patent_app_number] => 17/181018 [patent_app_country] => US [patent_app_date] => 2021-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 23 [patent_no_of_words] => 6413 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17181018 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/181018
Double-sided chip stack assembly Feb 21, 2021 Issued
Array ( [id] => 16850652 [patent_doc_number] => 20210151397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => RADIO-FREQUENCY MODULE AND COMMUNICATION DEVICE [patent_app_type] => utility [patent_app_number] => 17/161882 [patent_app_country] => US [patent_app_date] => 2021-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9562 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 377 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17161882 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/161882
Radio-frequency module and communication device Jan 28, 2021 Issued
Array ( [id] => 17130338 [patent_doc_number] => 20210305107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => POWER SEMICONDUCTOR MODULE [patent_app_type] => utility [patent_app_number] => 17/157650 [patent_app_country] => US [patent_app_date] => 2021-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3949 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17157650 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/157650
Power semiconductor module with adhesive filled tapered portion Jan 24, 2021 Issued
Array ( [id] => 16827767 [patent_doc_number] => 20210143060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-13 [patent_title] => HIGH SPEED, HIGH DENSITY, LOW POWER DIE INTERCONNECT SYSTEM [patent_app_type] => utility [patent_app_number] => 17/142925 [patent_app_country] => US [patent_app_date] => 2021-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19295 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17142925 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/142925
High speed, high density, low power die interconnect system Jan 5, 2021 Issued
Array ( [id] => 16765530 [patent_doc_number] => 20210111112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-15 [patent_title] => INTEGRATED CIRCUIT MODULE WITH A STRUCTURALLY BALANCED PACKAGE USING A BOTTOM SIDE INTERPOSER [patent_app_type] => utility [patent_app_number] => 17/128023 [patent_app_country] => US [patent_app_date] => 2020-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4149 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17128023 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/128023
Integrated circuit module with a structurally balanced package using a bottom side interposer Dec 18, 2020 Issued
Array ( [id] => 17025470 [patent_doc_number] => 20210249342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/105630 [patent_app_country] => US [patent_app_date] => 2020-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4234 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17105630 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/105630
Semiconductor package with heat radiation board Nov 26, 2020 Issued
Array ( [id] => 18249032 [patent_doc_number] => 11605630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-14 [patent_title] => 3D integrated circuit device and structure with hybrid bonding [patent_app_type] => utility [patent_app_number] => 17/100904 [patent_app_country] => US [patent_app_date] => 2020-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 76 [patent_figures_cnt] => 89 [patent_no_of_words] => 25078 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17100904 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/100904
3D integrated circuit device and structure with hybrid bonding Nov 21, 2020 Issued
Array ( [id] => 16692215 [patent_doc_number] => 20210074694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => Under-Bump-Metallization Structure and Redistribution Layer Design for Integrated Fan-Out Package with Integrated Passive Device [patent_app_type] => utility [patent_app_number] => 17/099179 [patent_app_country] => US [patent_app_date] => 2020-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11927 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17099179 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/099179
Under-bump-metallization structure and redistribution layer design for integrated fan-out package with integrated passive device Nov 15, 2020 Issued
Array ( [id] => 16660881 [patent_doc_number] => 20210057518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-25 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/094104 [patent_app_country] => US [patent_app_date] => 2020-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8399 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17094104 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/094104
Semiconductor device including a plurality of electrodes and supporters Nov 9, 2020 Issued
Array ( [id] => 16631835 [patent_doc_number] => 20210050488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-18 [patent_title] => LIGHT EMITTING DEVICE HAVING MULTIPLE LIGHT EMITTING ELEMENTS [patent_app_type] => utility [patent_app_number] => 17/086975 [patent_app_country] => US [patent_app_date] => 2020-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11436 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17086975 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/086975
Light emitting device having multiple light emitting elements Nov 1, 2020 Issued
Array ( [id] => 16625015 [patent_doc_number] => 20210043668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => IMAGE SENSOR INCLUDING A PIXEL ARRAY HAVING PIXEL BLOCKS ARRANGED IN A ZIGZAG FORM [patent_app_type] => utility [patent_app_number] => 17/080321 [patent_app_country] => US [patent_app_date] => 2020-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8687 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17080321 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/080321
Image sensor including a pixel array having pixel blocks arranged in a zigzag form Oct 25, 2020 Issued
Array ( [id] => 16796164 [patent_doc_number] => 20210125981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => 3D DEVICE AND DEVICES WITH BONDING [patent_app_type] => utility [patent_app_number] => 17/026146 [patent_app_country] => US [patent_app_date] => 2020-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24585 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17026146 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/026146
3D device and devices with bonding Sep 17, 2020 Issued
Array ( [id] => 17070666 [patent_doc_number] => 20210272883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => LEAD FRAME FOR HERMETIC RF CHIP PACKAGE EMBEDDED WITH IMPEDANCE MATCHING FUNCTION [patent_app_type] => utility [patent_app_number] => 17/009116 [patent_app_country] => US [patent_app_date] => 2020-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2114 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17009116 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/009116
Lead frame for hermetic RF chip package embedded with impedance matching function Aug 31, 2020 Issued
Array ( [id] => 16509291 [patent_doc_number] => 20200388547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/002238 [patent_app_country] => US [patent_app_date] => 2020-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9575 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17002238 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/002238
Method for manufacturing a semiconductor device having a semiconductor element mounted on a lead frame Aug 24, 2020 Issued
Array ( [id] => 18205461 [patent_doc_number] => 11587866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-21 [patent_title] => Integrated electronic device with a redistribution region and a high resilience to mechanical stresses and method for its preparation [patent_app_type] => utility [patent_app_number] => 17/000165 [patent_app_country] => US [patent_app_date] => 2020-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 4694 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17000165 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/000165
Integrated electronic device with a redistribution region and a high resilience to mechanical stresses and method for its preparation Aug 20, 2020 Issued
Array ( [id] => 18105667 [patent_doc_number] => 11545567 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Methods for forming fluorine doped high electron mobility transistor (HEMT) devices [patent_app_type] => utility [patent_app_number] => 16/997029 [patent_app_country] => US [patent_app_date] => 2020-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 6364 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16997029 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/997029
Methods for forming fluorine doped high electron mobility transistor (HEMT) devices Aug 18, 2020 Issued
Array ( [id] => 18416460 [patent_doc_number] => 11671010 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Power delivery for multi-chip-package using in-package voltage regulator [patent_app_type] => utility [patent_app_number] => 16/991335 [patent_app_country] => US [patent_app_date] => 2020-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 7583 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16991335 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/991335
Power delivery for multi-chip-package using in-package voltage regulator Aug 11, 2020 Issued
Array ( [id] => 16846037 [patent_doc_number] => 11018133 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => 3D integrated circuit [patent_app_type] => utility [patent_app_number] => 16/945796 [patent_app_country] => US [patent_app_date] => 2020-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 76 [patent_figures_cnt] => 89 [patent_no_of_words] => 24607 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16945796 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/945796
3D integrated circuit Jul 30, 2020 Issued
Array ( [id] => 16987961 [patent_doc_number] => 11075144 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-27 [patent_title] => Cooler and semiconductor module [patent_app_type] => utility [patent_app_number] => 16/944345 [patent_app_country] => US [patent_app_date] => 2020-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 6420 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16944345 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/944345
Cooler and semiconductor module Jul 30, 2020 Issued
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