
Alexander O Williams
Examiner (ID: 12148, Phone: (571)272-1924 , Office: P/2826 )
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2826, 2811, 2508 |
| Total Applications | 2764 |
| Issued Applications | 2318 |
| Pending Applications | 64 |
| Abandoned Applications | 383 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 12019717
[patent_doc_number] => 09812427
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[patent_kind] => B2
[patent_issue_date] => 2017-11-07
[patent_title] => 'Package on-package (PoP) structure including stud bulbs'
[patent_app_type] => utility
[patent_app_number] => 15/288751
[patent_app_country] => US
[patent_app_date] => 2016-10-07
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Array
(
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[patent_doc_number] => 20170018520
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[patent_kind] => A1
[patent_issue_date] => 2017-01-19
[patent_title] => 'USING AN INTERCONNECT BUMP TO TRAVERSE THROUGH A PASSIVATION LAYER OF A SEMICONDUCTOR DIE'
[patent_app_type] => utility
[patent_app_number] => 15/278960
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[patent_app_date] => 2016-09-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/278960 | USING AN INTERCONNECT BUMP TO TRAVERSE THROUGH A PASSIVATION LAYER OF A SEMICONDUCTOR DIE | Sep 27, 2016 | Abandoned |
Array
(
[id] => 11385934
[patent_doc_number] => 20170011990
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[patent_kind] => A1
[patent_issue_date] => 2017-01-12
[patent_title] => 'SEMICONDUCTOR DEVICE WITH LEAD TERMINALS HAVING PORTIONS THEREOF EXTENDING OBLIQUELY'
[patent_app_type] => utility
[patent_app_number] => 15/272557
[patent_app_country] => US
[patent_app_date] => 2016-09-22
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/272557 | Semiconductor device with lead terminals having portions thereof extending obliquely | Sep 21, 2016 | Issued |
Array
(
[id] => 13099067
[patent_doc_number] => 10068879
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-09-04
[patent_title] => Three-dimensional stacked integrated circuit devices and methods of assembling the same
[patent_app_type] => utility
[patent_app_number] => 15/269576
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[patent_app_date] => 2016-09-19
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Array
(
[id] => 12263791
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[patent_title] => 'PACKAGE STRUCTURE WITH DUMMY DIE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/268843 | Package structure with dummy die | Sep 18, 2016 | Issued |
Array
(
[id] => 12102109
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[patent_issue_date] => 2018-01-02
[patent_title] => 'Bottom self-aligned via'
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Array
(
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[patent_title] => 'Microchip with cap layer for redistribution circuitry and method of manufacturing the same'
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[patent_app_number] => 15/268169
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/268169 | Microchip with cap layer for redistribution circuitry and method of manufacturing the same | Sep 15, 2016 | Issued |
Array
(
[id] => 14333069
[patent_doc_number] => 10297563
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[patent_kind] => B2
[patent_issue_date] => 2019-05-21
[patent_title] => Copper seed layer and nickel-tin microbump structures
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/267065 | Copper seed layer and nickel-tin microbump structures | Sep 14, 2016 | Issued |
Array
(
[id] => 12953590
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[patent_issue_date] => 2017-12-05
[patent_title] => Tin-zinc microbump structures
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Array
(
[id] => 11339567
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[patent_issue_date] => 2016-12-15
[patent_title] => 'ELECTRONIC DEVICES WITH ATTACHED DIE STRUCTURES AND METHODS OF FORMATION OF SUCH DEVICES'
[patent_app_type] => utility
[patent_app_number] => 15/247393
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/247393 | Electronic devices with semiconductor die attached with sintered metallic layers, and methods of formation of such devices | Aug 24, 2016 | Issued |
Array
(
[id] => 11571796
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[patent_title] => 'SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING SAME'
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Array
(
[id] => 11475530
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/245298 | Semiconductor device having wire bonding connection and method for manufacturing the same | Aug 23, 2016 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/245441 | Integrated circuit device including vertical memory device and method of manufacturing the same | Aug 23, 2016 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/245087 | Substrate contact using dual sided silicidation | Aug 22, 2016 | Issued |
Array
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Array
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/741365 | Solid-state image sensing device, manufacturing method, and electronic apparatus | Jun 23, 2016 | Issued |