
Alexander O Williams
Examiner (ID: 12148, Phone: (571)272-1924 , Office: P/2826 )
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2826, 2811, 2508 |
| Total Applications | 2764 |
| Issued Applications | 2318 |
| Pending Applications | 64 |
| Abandoned Applications | 383 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10696910
[patent_doc_number] => 20160043058
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-02-11
[patent_title] => 'SEMICONDUCTOR COOLING STRUCTURE AND METHOD IN A MIXED BONDING PROCESS'
[patent_app_type] => utility
[patent_app_number] => 14/812702
[patent_app_country] => US
[patent_app_date] => 2015-07-29
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14812702
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/812702 | Semiconductor cooling method and method of heat dissipation | Jul 28, 2015 | Issued |
Array
(
[id] => 10681602
[patent_doc_number] => 20160027747
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-01-28
[patent_title] => 'SEMICONDUCTOR DEVICE WITH FINE PITCH REDISTRIBUTION LAYERS'
[patent_app_type] => utility
[patent_app_number] => 14/810664
[patent_app_country] => US
[patent_app_date] => 2015-07-28
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/810664 | Semiconductor device redistribution layer with narrow trace width relative to passivation layer opening | Jul 27, 2015 | Issued |
Array
(
[id] => 10725637
[patent_doc_number] => 20160071784
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-10
[patent_title] => 'SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/810523
[patent_app_country] => US
[patent_app_date] => 2015-07-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/810523 | Semiconductor package having conductive pillars | Jul 27, 2015 | Issued |
Array
(
[id] => 11259371
[patent_doc_number] => 09484275
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-01
[patent_title] => 'Semiconductor module for high pressure applications'
[patent_app_type] => utility
[patent_app_number] => 14/811394
[patent_app_country] => US
[patent_app_date] => 2015-07-28
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Array
(
[id] => 11681339
[patent_doc_number] => 09679873
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[patent_kind] => B2
[patent_issue_date] => 2017-06-13
[patent_title] => 'Low profile integrated circuit (IC) package comprising a plurality of dies'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/811261 | Low profile integrated circuit (IC) package comprising a plurality of dies | Jul 27, 2015 | Issued |
Array
(
[id] => 11221592
[patent_doc_number] => 09449935
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[patent_kind] => B1
[patent_issue_date] => 2016-09-20
[patent_title] => 'Wafer level package and fabrication method thereof'
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Array
(
[id] => 11359953
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[patent_issue_date] => 2017-01-03
[patent_title] => 'Memory modules with multi-chip packaged integrated circuits having flash memory'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/810346 | Memory modules with multi-chip packaged integrated circuits having flash memory | Jul 26, 2015 | Issued |
Array
(
[id] => 11925628
[patent_doc_number] => 09793217
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[patent_issue_date] => 2017-10-17
[patent_title] => 'Package-on-package type semiconductor device which is realized through applying not a TSV technology but a fan-out wafer level package technology'
[patent_app_type] => utility
[patent_app_number] => 14/809710
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/809710 | Package-on-package type semiconductor device which is realized through applying not a TSV technology but a fan-out wafer level package technology | Jul 26, 2015 | Issued |
Array
(
[id] => 11660161
[patent_doc_number] => 09673173
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[patent_issue_date] => 2017-06-06
[patent_title] => 'Integrated circuit package with embedded passive structures'
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[patent_app_number] => 14/808743
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/808743 | Integrated circuit package with embedded passive structures | Jul 23, 2015 | Issued |
Array
(
[id] => 11483390
[patent_doc_number] => 09589945
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[patent_title] => 'Semiconductor package having stacked semiconductor chips'
[patent_app_type] => utility
[patent_app_number] => 14/804880
[patent_app_country] => US
[patent_app_date] => 2015-07-21
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/804880 | Semiconductor package having stacked semiconductor chips | Jul 20, 2015 | Issued |
Array
(
[id] => 10440530
[patent_doc_number] => 20150325542
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[patent_issue_date] => 2015-11-12
[patent_title] => 'CONDUCTIVE CONTACTS HAVING VARYING WIDTHS AND METHOD OF MANUFACTURING SAME'
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[patent_app_number] => 14/804617
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/804617 | Conductive contacts having varying widths and method of manufacturing same | Jul 20, 2015 | Issued |
Array
(
[id] => 12498402
[patent_doc_number] => 09997428
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[patent_title] => Via structures for thermal dissipation
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Array
(
[id] => 11050751
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Array
(
[id] => 11233773
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/796506 | Wafer-to-wafer bonding structure | Jul 9, 2015 | Issued |
Array
(
[id] => 10666975
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Array
(
[id] => 11760327
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[patent_title] => 'INTEGRATED CIRCUIT STRUCTURES WITH RECESSED CONDUCTIVE CONTACTS FOR PACKAGE ON PACKAGE'
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Array
(
[id] => 10753048
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/732653 | Semiconductor package with a lead, package-on-package device including the same, and mobile device including the same | Jun 4, 2015 | Issued |