
Alexander O Williams
Examiner (ID: 12148, Phone: (571)272-1924 , Office: P/2826 )
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2826, 2811, 2508 |
| Total Applications | 2764 |
| Issued Applications | 2318 |
| Pending Applications | 64 |
| Abandoned Applications | 383 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10402689
[patent_doc_number] => 20150287698
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-10-08
[patent_title] => 'SEMICONDUCTOR ASSEMBLY COMPRISING CHIP ARRAYS'
[patent_app_type] => utility
[patent_app_number] => 14/669208
[patent_app_country] => US
[patent_app_date] => 2015-03-26
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/669208 | Semiconductor assembly comprising chip arrays | Mar 25, 2015 | Issued |
Array
(
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[patent_doc_number] => 09524917
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[patent_kind] => B2
[patent_issue_date] => 2016-12-20
[patent_title] => 'Chip level heat dissipation using silicon'
[patent_app_type] => utility
[patent_app_number] => 14/662088
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Array
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[patent_title] => 'POWER MODULE PACKAGE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/661844 | Power module package including heat spreader and inductance coil | Mar 17, 2015 | Issued |
Array
(
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[patent_issue_date] => 2016-08-16
[patent_title] => 'Integrated circuit chip assembled on an interposer'
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Array
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[patent_title] => 'Semiconductor device having semiconductor chips in resin and electronic circuit device with the semiconductor device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/641864 | Semiconductor device having semiconductor chips in resin and electronic circuit device with the semiconductor device | Mar 8, 2015 | Issued |
Array
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[patent_title] => 'Lead-free solder alloy, solder material and joined structure'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/120937 | Lead-free solder alloy, solder material and joined structure | Feb 18, 2015 | Issued |
Array
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[patent_title] => 'METHOD FOR ARRANGING ELECTRONIC SWITCHING ELEMENTS, ELECTRONIC SWITCHING ARRANGEMENT AND USE OF A CARRIER HAVING A BONDING LAYER'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/115541 | Method for arranging electronic switching elements, electronic switching arrangement and use of a carrier having a bonding layer | Jan 27, 2015 | Issued |
Array
(
[id] => 13111855
[patent_doc_number] => 10074585
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[patent_kind] => B2
[patent_issue_date] => 2018-09-11
[patent_title] => Power module with dummy terminal structure
[patent_app_type] => utility
[patent_app_number] => 15/529568
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/529568 | Power module with dummy terminal structure | Jan 19, 2015 | Issued |
Array
(
[id] => 11959399
[patent_doc_number] => 20170263551
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[patent_kind] => A1
[patent_issue_date] => 2017-09-14
[patent_title] => 'NOVEL METHOD FOR CREATING ALTERNATE HARDMASK CAP INTERCONNECT STRUCTURE WITH INCREASED OVERLAY MARGIN'
[patent_app_type] => utility
[patent_app_number] => 15/529483
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/529483 | Method for creating alternate hardmask cap interconnect structure with increased overlay margin | Dec 23, 2014 | Issued |
Array
(
[id] => 11959401
[patent_doc_number] => 20170263553
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[patent_kind] => A1
[patent_issue_date] => 2017-09-14
[patent_title] => 'STRUCTURE AND METHOD TO SELF ALIGN VIA TO TOP AND BOTTOM OF TIGHT PITCH METAL INTERCONNECT LAYERS'
[patent_app_type] => utility
[patent_app_number] => 15/529484
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/529484 | Structure and method to self align via to top and bottom of tight pitch metal interconnect layers | Dec 23, 2014 | Issued |
Array
(
[id] => 13019053
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[patent_issue_date] => 2018-07-24
[patent_title] => Method and structure to contact tight pitch conductive layers with guided vias using alternating hardmasks and encapsulating etchstop liner scheme
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[patent_app_number] => 15/528736
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Array
(
[id] => 10217495
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[patent_title] => 'PRINTED CIRCUIT BOARD USING SOLDER COATING BALL'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/575915 | PRINTED CIRCUIT BOARD USING SOLDER COATING BALL | Dec 17, 2014 | Abandoned |
Array
(
[id] => 10199213
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[patent_title] => 'Copper Ball Bond Features and Structure'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/557769 | Copper ball bond features and structure | Dec 1, 2014 | Issued |
Array
(
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Array
(
[id] => 9928395
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Array
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[id] => 11459987
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[rel_patent_id] =>[rel_patent_doc_number] =>) 15/039083 | Semiconductor device having wire formed with loop portion and method for producing the semiconductor device | Nov 18, 2014 | Issued |
Array
(
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/535391 | Customized module lid | Nov 6, 2014 | Issued |