Search

Alexander O Williams

Examiner (ID: 4421, Phone: (571)272-1924 , Office: P/2826 )

Most Active Art Unit
2826
Art Unit(s)
2508, 2826, 2811
Total Applications
2764
Issued Applications
2318
Pending Applications
64
Abandoned Applications
383

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9951793 [patent_doc_number] => 09000587 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-04-07 [patent_title] => 'Wafer-level thin chip integration' [patent_app_type] => utility [patent_app_number] => 13/930439 [patent_app_country] => US [patent_app_date] => 2013-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4181 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13930439 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/930439
Wafer-level thin chip integration Jun 27, 2013 Issued
Array ( [id] => 10563519 [patent_doc_number] => 09287200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-15 [patent_title] => 'Packaged semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/928876 [patent_app_country] => US [patent_app_date] => 2013-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4738 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13928876 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/928876
Packaged semiconductor device Jun 26, 2013 Issued
Array ( [id] => 9195360 [patent_doc_number] => 20130334675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-19 [patent_title] => 'PACKAGE STRUCTURE HAVING LATERAL CONNECTIONS' [patent_app_type] => utility [patent_app_number] => 13/919536 [patent_app_country] => US [patent_app_date] => 2013-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9747 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13919536 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/919536
Methods, circuits and systems for a package structure having wireless lateral connections Jun 16, 2013 Issued
Array ( [id] => 10106715 [patent_doc_number] => 09142498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-22 [patent_title] => 'Semiconductor devices having stacked solder bumps with intervening metal layers to provide electrical interconnections' [patent_app_type] => utility [patent_app_number] => 13/917000 [patent_app_country] => US [patent_app_date] => 2013-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 27 [patent_no_of_words] => 6972 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13917000 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/917000
Semiconductor devices having stacked solder bumps with intervening metal layers to provide electrical interconnections Jun 12, 2013 Issued
Array ( [id] => 9367492 [patent_doc_number] => 20140077365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'Metal Bump and Method of Manufacturing Same' [patent_app_type] => utility [patent_app_number] => 13/904885 [patent_app_country] => US [patent_app_date] => 2013-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3040 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13904885 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/904885
Conductive contacts having varying widths and method of manufacturing same May 28, 2013 Issued
Array ( [id] => 9590024 [patent_doc_number] => 08779567 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-15 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/900730 [patent_app_country] => US [patent_app_date] => 2013-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 10493 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13900730 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/900730
Semiconductor device May 22, 2013 Issued
Array ( [id] => 9850796 [patent_doc_number] => 08952533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-10 [patent_title] => 'Devices and methods for 2.5D interposers' [patent_app_type] => utility [patent_app_number] => 13/897156 [patent_app_country] => US [patent_app_date] => 2013-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3443 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13897156 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/897156
Devices and methods for 2.5D interposers May 16, 2013 Issued
Array ( [id] => 10936693 [patent_doc_number] => 20140339714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-11-20 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/896243 [patent_app_country] => US [patent_app_date] => 2013-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2216 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13896243 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/896243
Semiconductor device having alignment mark May 15, 2013 Issued
Array ( [id] => 9171712 [patent_doc_number] => 20130313697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-28 [patent_title] => 'SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/894565 [patent_app_country] => US [patent_app_date] => 2013-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9588 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13894565 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/894565
Semiconductor package including radiation plate May 14, 2013 Issued
Array ( [id] => 9158869 [patent_doc_number] => 20130307146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-21 [patent_title] => 'MOUNTING STRUCTURE OF ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING THE MOUNTING STRUCTURE OF THE ELECTRONIC COMPONENT' [patent_app_type] => utility [patent_app_number] => 13/891566 [patent_app_country] => US [patent_app_date] => 2013-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8928 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13891566 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/891566
Mounting structure of electronic component with joining portions and method of manufacturing the same May 9, 2013 Issued
Array ( [id] => 9031687 [patent_doc_number] => 20130234325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-12 [patent_title] => 'FILLED THROUGH-SILICON VIA AND THE FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/873249 [patent_app_country] => US [patent_app_date] => 2013-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4476 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13873249 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/873249
FILLED THROUGH-SILICON VIA AND THE FABRICATION METHOD THEREOF Apr 29, 2013 Abandoned
Array ( [id] => 9145447 [patent_doc_number] => 20130299970 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-14 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/872012 [patent_app_country] => US [patent_app_date] => 2013-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 28109 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13872012 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/872012
Semiconductor device including wiring board with semiconductor chip Apr 25, 2013 Issued
Array ( [id] => 9091277 [patent_doc_number] => 20130270588 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'LEAD FRAME ASSEMBLY, LED PACKAGE AND LED LIGHT BAR' [patent_app_type] => utility [patent_app_number] => 13/850375 [patent_app_country] => US [patent_app_date] => 2013-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4330 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13850375 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/850375
Lead frame assembly, LED package and LED light bar Mar 25, 2013 Issued
Array ( [id] => 9818342 [patent_doc_number] => 08928130 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-06 [patent_title] => 'Lead frame including an insulating resin layer entirely covering lead surface, and semiconductor device including the same' [patent_app_type] => utility [patent_app_number] => 13/848225 [patent_app_country] => US [patent_app_date] => 2013-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 105 [patent_no_of_words] => 22955 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13848225 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/848225
Lead frame including an insulating resin layer entirely covering lead surface, and semiconductor device including the same Mar 20, 2013 Issued
Array ( [id] => 9850794 [patent_doc_number] => 08952531 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-10 [patent_title] => 'Packaging method using solder coating ball and package having solder pattern including metal pattern' [patent_app_type] => utility [patent_app_number] => 13/845108 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 4453 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13845108 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/845108
Packaging method using solder coating ball and package having solder pattern including metal pattern Mar 17, 2013 Issued
Array ( [id] => 9594712 [patent_doc_number] => 20140191389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/845446 [patent_app_country] => US [patent_app_date] => 2013-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5799 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13845446 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/845446
Three dimensional semiconductor device including pads Mar 17, 2013 Issued
Array ( [id] => 9132109 [patent_doc_number] => 20130292822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'BUMP STRUCTURE, SEMICONDUCTOR PACKAGE HAVING THE BUMP STRUCTURE, AND METHOD OF FORMING THE BUMP STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/834475 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6294 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13834475 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/834475
Bump structure, having concave lateral sides, semiconductor package having the bump structure, and method of forming the bump structure Mar 14, 2013 Issued
Array ( [id] => 10898764 [patent_doc_number] => 08921986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-30 [patent_title] => 'Insulated bump bonding' [patent_app_type] => utility [patent_app_number] => 13/831682 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 5397 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13831682 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/831682
Insulated bump bonding Mar 14, 2013 Issued
Array ( [id] => 9266686 [patent_doc_number] => 20140021602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-23 [patent_title] => 'SUBSTRATE FOR SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/842810 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6697 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13842810 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/842810
Substrate for semiconductor package which can prevent the snapping of a circuit trace despite physical deformation of a semiconductor package and semiconductor package having the same Mar 14, 2013 Issued
Array ( [id] => 8960880 [patent_doc_number] => 20130200481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING GROOVE-SHAPED VIA-HOLE' [patent_app_type] => utility [patent_app_number] => 13/834418 [patent_app_country] => US [patent_app_date] => 2013-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 16278 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13834418 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/834418
Semiconductor device having groove-shaped via-hole Mar 14, 2013 Issued
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