Search

Alexander O. Williams

Examiner (ID: 4421)

Most Active Art Unit
2826
Art Unit(s)
2508, 2826, 2811
Total Applications
2764
Issued Applications
2318
Pending Applications
64
Abandoned Applications
383

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9303935 [patent_doc_number] => 20140042609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-13 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/110935 [patent_app_country] => US [patent_app_date] => 2012-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4542 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14110935 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/110935
Semiconductor device for preventing a progression of a crack in a solder layer and method of manufacturing the same May 10, 2012 Issued
Array ( [id] => 10047310 [patent_doc_number] => 09087710 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-21 [patent_title] => 'Semiconductor device with stacked semiconductor chips' [patent_app_type] => utility [patent_app_number] => 13/462499 [patent_app_country] => US [patent_app_date] => 2012-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3554 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13462499 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/462499
Semiconductor device with stacked semiconductor chips May 1, 2012 Issued
Array ( [id] => 10583736 [patent_doc_number] => 09305862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-05 [patent_title] => 'Support mounted electrically interconnected die assembly' [patent_app_type] => utility [patent_app_number] => 13/456126 [patent_app_country] => US [patent_app_date] => 2012-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 29 [patent_no_of_words] => 9065 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13456126 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/456126
Support mounted electrically interconnected die assembly Apr 24, 2012 Issued
Array ( [id] => 8334690 [patent_doc_number] => 20120201395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'METHOD AND SYSTEM FOR CONTROLLING A MAXIMUM SIGNAL LEVEL OUTPUT TO HEADPHONES COUPLED TO A WIRELESS DEVICE' [patent_app_type] => utility [patent_app_number] => 13/450349 [patent_app_country] => US [patent_app_date] => 2012-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4111 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13450349 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/450349
Method and system for controlling a maximum signal level output to headphones coupled to a wireless device Apr 17, 2012 Issued
Array ( [id] => 9524779 [patent_doc_number] => 08749055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-10 [patent_title] => 'Semiconductor device with resin mold' [patent_app_type] => utility [patent_app_number] => 13/449484 [patent_app_country] => US [patent_app_date] => 2012-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 72 [patent_no_of_words] => 22728 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13449484 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/449484
Semiconductor device with resin mold Apr 17, 2012 Issued
Array ( [id] => 8275060 [patent_doc_number] => 20120168932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-05 [patent_title] => 'SEMICONDUCTOR ASSEMBLY THAT INCLUDES A POWER SEMICONDUCTOR DIE LOCATED ON A CELL DEFINED BY FIRST AND SECOND PATTERNED POLYMER LAYERS' [patent_app_type] => utility [patent_app_number] => 13/422050 [patent_app_country] => US [patent_app_date] => 2012-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3632 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13422050 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/422050
Semiconductor assembly that includes a power semiconductor die located on a cell defined by first and second patterned polymer layers Mar 15, 2012 Issued
Array ( [id] => 9530546 [patent_doc_number] => 08754421 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-17 [patent_title] => 'Method for processing semiconductors using a combination of electron beam and optical lithography' [patent_app_type] => utility [patent_app_number] => 13/404245 [patent_app_country] => US [patent_app_date] => 2012-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 2925 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13404245 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/404245
Method for processing semiconductors using a combination of electron beam and optical lithography Feb 23, 2012 Issued
Array ( [id] => 9627147 [patent_doc_number] => 08796832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-05 [patent_title] => 'Wiring device for semiconductor device, composite wiring device for semiconductor device, and resin-sealed semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/403616 [patent_app_country] => US [patent_app_date] => 2012-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 26 [patent_no_of_words] => 15291 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13403616 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/403616
Wiring device for semiconductor device, composite wiring device for semiconductor device, and resin-sealed semiconductor device Feb 22, 2012 Issued
Array ( [id] => 9951790 [patent_doc_number] => 09000582 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-07 [patent_title] => 'Power semiconductor module and power conversion device' [patent_app_type] => utility [patent_app_number] => 13/979595 [patent_app_country] => US [patent_app_date] => 2012-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 15519 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13979595 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/979595
Power semiconductor module and power conversion device Feb 20, 2012 Issued
Array ( [id] => 8426740 [patent_doc_number] => 20120248615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-04 [patent_title] => 'MEMS DEVICE AND MANUFACTURING PROCESS THEREOF' [patent_app_type] => utility [patent_app_number] => 13/401075 [patent_app_country] => US [patent_app_date] => 2012-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6129 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13401075 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/401075
MEMS device with simplified electrical conducting paths Feb 20, 2012 Issued
Array ( [id] => 8987119 [patent_doc_number] => 20130214400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-22 [patent_title] => 'MICRO-ELECTRO MECHANICAL SYSTEMS (MEMS) STRUCTURES AND METHODS OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/399903 [patent_app_country] => US [patent_app_date] => 2012-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5471 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13399903 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/399903
Micro-electro mechanical systems (MEMS) having outgasing prevention structures and methods of forming the same Feb 16, 2012 Issued
Array ( [id] => 9428304 [patent_doc_number] => 08704384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-22 [patent_title] => 'Stacked die assembly' [patent_app_type] => utility [patent_app_number] => 13/399939 [patent_app_country] => US [patent_app_date] => 2012-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 10572 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13399939 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/399939
Stacked die assembly Feb 16, 2012 Issued
Array ( [id] => 8987125 [patent_doc_number] => 20130214406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-22 [patent_title] => 'Flexible Heat Sink With Lateral Compliance' [patent_app_type] => utility [patent_app_number] => 13/398534 [patent_app_country] => US [patent_app_date] => 2012-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4093 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13398534 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/398534
Flexible heat sink with lateral compliance Feb 15, 2012 Issued
Array ( [id] => 8944397 [patent_doc_number] => 08497579 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-07-30 [patent_title] => 'Semiconductor packaging method and structure thereof' [patent_app_type] => utility [patent_app_number] => 13/398081 [patent_app_country] => US [patent_app_date] => 2012-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1537 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13398081 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/398081
Semiconductor packaging method and structure thereof Feb 15, 2012 Issued
Array ( [id] => 11817915 [patent_doc_number] => 09721872 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-01 [patent_title] => 'Methods and structures for increasing the allowable die size in TMV packages' [patent_app_type] => utility [patent_app_number] => 13/398646 [patent_app_country] => US [patent_app_date] => 2012-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 29 [patent_no_of_words] => 3841 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13398646 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/398646
Methods and structures for increasing the allowable die size in TMV packages Feb 15, 2012 Issued
Array ( [id] => 8390930 [patent_doc_number] => 20120228763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-13 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/398372 [patent_app_country] => US [patent_app_date] => 2012-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6242 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13398372 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/398372
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Feb 15, 2012 Abandoned
Array ( [id] => 10888655 [patent_doc_number] => 08912651 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-16 [patent_title] => 'Package-on-package (PoP) structure including stud bulbs and method' [patent_app_type] => utility [patent_app_number] => 13/397747 [patent_app_country] => US [patent_app_date] => 2012-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 40 [patent_no_of_words] => 6364 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13397747 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/397747
Package-on-package (PoP) structure including stud bulbs and method Feb 15, 2012 Issued
Array ( [id] => 9441539 [patent_doc_number] => 08710653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-29 [patent_title] => 'Chip on chip semiconductor device including an underfill layer having a resin containing an amine-based curing agent' [patent_app_type] => utility [patent_app_number] => 13/397098 [patent_app_country] => US [patent_app_date] => 2012-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4910 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13397098 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/397098
Chip on chip semiconductor device including an underfill layer having a resin containing an amine-based curing agent Feb 14, 2012 Issued
Array ( [id] => 9455857 [patent_doc_number] => 08716871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-06 [patent_title] => 'Big via structure' [patent_app_type] => utility [patent_app_number] => 13/397488 [patent_app_country] => US [patent_app_date] => 2012-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4663 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13397488 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/397488
Big via structure Feb 14, 2012 Issued
Array ( [id] => 9504258 [patent_doc_number] => 08742576 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-03 [patent_title] => 'Maintaining alignment in a multi-chip module using a compressible structure' [patent_app_type] => utility [patent_app_number] => 13/397593 [patent_app_country] => US [patent_app_date] => 2012-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5152 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13397593 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/397593
Maintaining alignment in a multi-chip module using a compressible structure Feb 14, 2012 Issued
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