Search

Alexander O. Williams

Examiner (ID: 4421)

Most Active Art Unit
2826
Art Unit(s)
2508, 2826, 2811
Total Applications
2764
Issued Applications
2318
Pending Applications
64
Abandoned Applications
383

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9389962 [patent_doc_number] => 08686566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-01 [patent_title] => 'In situ-built pin-grid arrays for coreless substrates, and methods of making same' [patent_app_type] => utility [patent_app_number] => 13/174109 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5786 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13174109 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/174109
In situ-built pin-grid arrays for coreless substrates, and methods of making same Jun 29, 2011 Issued
Array ( [id] => 9389962 [patent_doc_number] => 08686566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-01 [patent_title] => 'In situ-built pin-grid arrays for coreless substrates, and methods of making same' [patent_app_type] => utility [patent_app_number] => 13/174109 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5786 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13174109 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/174109
In situ-built pin-grid arrays for coreless substrates, and methods of making same Jun 29, 2011 Issued
Array ( [id] => 8379802 [patent_doc_number] => 20120223429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-06 [patent_title] => 'Package 3D Interconnection and Method of Making Same' [patent_app_type] => utility [patent_app_number] => 13/174066 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7401 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13174066 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/174066
Package 3D interconnection and method of making same Jun 29, 2011 Issued
Array ( [id] => 8760711 [patent_doc_number] => 08421235 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-16 [patent_title] => 'Semiconductor device with heat spreaders' [patent_app_type] => utility [patent_app_number] => 13/173347 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 7805 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13173347 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/173347
Semiconductor device with heat spreaders Jun 29, 2011 Issued
Array ( [id] => 8982686 [patent_doc_number] => 08513806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Laminated high melting point soldering layer formed by TLP bonding and fabrication method for the same, and semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/173122 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 21 [patent_no_of_words] => 10980 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13173122 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/173122
Laminated high melting point soldering layer formed by TLP bonding and fabrication method for the same, and semiconductor device Jun 29, 2011 Issued
Array ( [id] => 8982696 [patent_doc_number] => 08513816 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Film for flip chip type semiconductor back surface containing thermoconductive filler' [patent_app_type] => utility [patent_app_number] => 13/173226 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 20657 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13173226 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/173226
Film for flip chip type semiconductor back surface containing thermoconductive filler Jun 29, 2011 Issued
Array ( [id] => 7706653 [patent_doc_number] => 20120001315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/171801 [patent_app_country] => US [patent_app_date] => 2011-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3843 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13171801 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/171801
Semiconductor device with exposed thermal conductivity part Jun 28, 2011 Issued
Array ( [id] => 7506864 [patent_doc_number] => 20110254175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/172571 [patent_app_country] => US [patent_app_date] => 2011-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12900 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20110254175.pdf [firstpage_image] =>[orig_patent_app_number] => 13172571 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/172571
Semiconductor memory device Jun 28, 2011 Issued
Array ( [id] => 8802851 [patent_doc_number] => 08441127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-14 [patent_title] => 'Bump-on-trace structures with wide and narrow portions' [patent_app_type] => utility [patent_app_number] => 13/172470 [patent_app_country] => US [patent_app_date] => 2011-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 3172 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13172470 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/172470
Bump-on-trace structures with wide and narrow portions Jun 28, 2011 Issued
Array ( [id] => 8982704 [patent_doc_number] => 08513823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Semiconductor package having main stamp and sub-stamp' [patent_app_type] => utility [patent_app_number] => 13/172328 [patent_app_country] => US [patent_app_date] => 2011-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 28 [patent_no_of_words] => 3940 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13172328 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/172328
Semiconductor package having main stamp and sub-stamp Jun 28, 2011 Issued
Array ( [id] => 8713829 [patent_doc_number] => 08399970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Semiconductor device attached to island having protrusion' [patent_app_type] => utility [patent_app_number] => 13/171944 [patent_app_country] => US [patent_app_date] => 2011-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 9344 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13171944 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/171944
Semiconductor device attached to island having protrusion Jun 28, 2011 Issued
Array ( [id] => 7738919 [patent_doc_number] => 20120018880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/171906 [patent_app_country] => US [patent_app_date] => 2011-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3922 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20120018880.pdf [firstpage_image] =>[orig_patent_app_number] => 13171906 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/171906
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Jun 28, 2011 Abandoned
Array ( [id] => 7506812 [patent_doc_number] => 20110254149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-20 [patent_title] => 'SEMICONDUCTOR COMPONENT AND MANUFACTURING METHOD OF SEMICONDUCTOR COMPONENT' [patent_app_type] => utility [patent_app_number] => 13/171382 [patent_app_country] => US [patent_app_date] => 2011-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4970 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20110254149.pdf [firstpage_image] =>[orig_patent_app_number] => 13171382 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/171382
Semiconductor component having adhesive squeeze-out prevention configuration and method of manufacturing the same Jun 27, 2011 Issued
Array ( [id] => 8214854 [patent_doc_number] => 08193547 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-05 [patent_title] => 'Leadframe-based packages for solid state light emitting devices and methods of forming leadframe-based packages for solid state light emitting devices' [patent_app_type] => utility [patent_app_number] => 13/153930 [patent_app_country] => US [patent_app_date] => 2011-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 7036 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/193/08193547.pdf [firstpage_image] =>[orig_patent_app_number] => 13153930 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/153930
Leadframe-based packages for solid state light emitting devices and methods of forming leadframe-based packages for solid state light emitting devices Jun 5, 2011 Issued
Array ( [id] => 8166490 [patent_doc_number] => 20120104621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-03 [patent_title] => 'POWER PACKAGE MODULE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/150879 [patent_app_country] => US [patent_app_date] => 2011-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5066 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20120104621.pdf [firstpage_image] =>[orig_patent_app_number] => 13150879 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/150879
Power package module with low and high power chips and method for fabricating the same May 31, 2011 Issued
Array ( [id] => 8956605 [patent_doc_number] => 08502385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-06 [patent_title] => 'Power semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/150593 [patent_app_country] => US [patent_app_date] => 2011-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 6390 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13150593 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/150593
Power semiconductor device May 31, 2011 Issued
Array ( [id] => 8749962 [patent_doc_number] => 08415796 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-09 [patent_title] => 'Semiconductor device having a multilayer structure' [patent_app_type] => utility [patent_app_number] => 13/117326 [patent_app_country] => US [patent_app_date] => 2011-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 6571 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13117326 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/117326
Semiconductor device having a multilayer structure May 26, 2011 Issued
Array ( [id] => 8982691 [patent_doc_number] => 08513811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Electronic device and method for connecting a die to a connection terminal' [patent_app_type] => utility [patent_app_number] => 13/117340 [patent_app_country] => US [patent_app_date] => 2011-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4620 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13117340 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/117340
Electronic device and method for connecting a die to a connection terminal May 26, 2011 Issued
Array ( [id] => 6010670 [patent_doc_number] => 20110221067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-15 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 13/113644 [patent_app_country] => US [patent_app_date] => 2011-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6598 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20110221067.pdf [firstpage_image] =>[orig_patent_app_number] => 13113644 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/113644
Semiconductor integrated circuit device having improved interconnect accuracy near cell boundaries May 22, 2011 Issued
Array ( [id] => 8560521 [patent_doc_number] => 08334586 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-18 [patent_title] => 'Stacked semiconductor chips with separate encapsulations' [patent_app_type] => utility [patent_app_number] => 13/110372 [patent_app_country] => US [patent_app_date] => 2011-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 36 [patent_no_of_words] => 6935 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13110372 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/110372
Stacked semiconductor chips with separate encapsulations May 17, 2011 Issued
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