
Alexander O Williams
Examiner (ID: 12148, Phone: (571)272-1924 , Office: P/2826 )
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2826, 2811, 2508 |
| Total Applications | 2764 |
| Issued Applications | 2318 |
| Pending Applications | 64 |
| Abandoned Applications | 383 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17410211
[patent_doc_number] => 11251108
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-02-15
[patent_title] => Semiconductor module mounted on a cooling device for use in a vehicle
[patent_app_type] => utility
[patent_app_number] => 16/589097
[patent_app_country] => US
[patent_app_date] => 2019-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 11980
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16589097
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/589097 | Semiconductor module mounted on a cooling device for use in a vehicle | Sep 29, 2019 | Issued |
Array
(
[id] => 15443011
[patent_doc_number] => 20200035689
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-30
[patent_title] => EIGHT-TRANSISTOR STATIC RANDOM ACCESS MEMORY, LAYOUT THEREOF, AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/588828
[patent_app_country] => US
[patent_app_date] => 2019-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15130
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16588828
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/588828 | Eight-transistor static random access memory, layout thereof, and method for manufacturing the same | Sep 29, 2019 | Issued |
Array
(
[id] => 17500705
[patent_doc_number] => 11289415
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-03-29
[patent_title] => Semiconductor device including semiconductor chip having elongated bumps
[patent_app_type] => utility
[patent_app_number] => 16/588700
[patent_app_country] => US
[patent_app_date] => 2019-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 18
[patent_no_of_words] => 7944
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16588700
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/588700 | Semiconductor device including semiconductor chip having elongated bumps | Sep 29, 2019 | Issued |
Array
(
[id] => 16731240
[patent_doc_number] => 20210098388
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-01
[patent_title] => Bottom Barrier Free Interconnects Without Voids
[patent_app_type] => utility
[patent_app_number] => 16/586947
[patent_app_country] => US
[patent_app_date] => 2019-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3393
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586947
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/586947 | Bottom barrier free interconnects without voids | Sep 27, 2019 | Issued |
Array
(
[id] => 15688363
[patent_doc_number] => 20200098845
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-26
[patent_title] => DISPLAY SUBSTRATE, METHOD FOR MANUFACTURING THE SAME AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/576812
[patent_app_country] => US
[patent_app_date] => 2019-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6186
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 251
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16576812
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/576812 | Display substrate for avoiding light leakage defect, method for manufacturing the same and display device | Sep 19, 2019 | Issued |
Array
(
[id] => 15351667
[patent_doc_number] => 20200013725
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-09
[patent_title] => OPTICAL CHIP ID DEFINITION USING NANOIMPRINT LITHOGRAPHY
[patent_app_type] => utility
[patent_app_number] => 16/573530
[patent_app_country] => US
[patent_app_date] => 2019-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4561
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16573530
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/573530 | Optical chip ID definition using nanoimprint lithography | Sep 16, 2019 | Issued |
Array
(
[id] => 15351715
[patent_doc_number] => 20200013749
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-09
[patent_title] => CHIP PACKAGE AND METHOD OF FORMING A CHIP PACKAGE WITH A METAL CONTACT STRUCTURE AND PROTECTIVE LAYER, AND METHOD OF FORMING AN ELECTRICAL CONTACT
[patent_app_type] => utility
[patent_app_number] => 16/572626
[patent_app_country] => US
[patent_app_date] => 2019-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23280
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16572626
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/572626 | Method of forming an electrical contact and method of forming a chip package with a metal contact structure and protective layer | Sep 16, 2019 | Issued |
Array
(
[id] => 15331723
[patent_doc_number] => 20200006191
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-02
[patent_title] => INTEGRATED FAN-OUT PACKAGES WITH EMBEDDED HEAT DISSIPATION STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 16/569898
[patent_app_country] => US
[patent_app_date] => 2019-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10018
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16569898
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/569898 | Integrated fan-out packages with embedded heat dissipation structure | Sep 12, 2019 | Issued |
Array
(
[id] => 16677462
[patent_doc_number] => 20210066228
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-04
[patent_title] => PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/557763
[patent_app_country] => US
[patent_app_date] => 2019-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12808
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557763
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/557763 | Package structure including pillars and method for manufacturing the same | Aug 29, 2019 | Issued |
Array
(
[id] => 17181323
[patent_doc_number] => 11158572
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-10-26
[patent_title] => Package structure including a first electronic device, a second electronic device and a plurality of dummy pillars
[patent_app_type] => utility
[patent_app_number] => 16/557740
[patent_app_country] => US
[patent_app_date] => 2019-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 37
[patent_figures_cnt] => 37
[patent_no_of_words] => 12808
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557740
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/557740 | Package structure including a first electronic device, a second electronic device and a plurality of dummy pillars | Aug 29, 2019 | Issued |
Array
(
[id] => 16316175
[patent_doc_number] => 20200294913
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-17
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/557351
[patent_app_country] => US
[patent_app_date] => 2019-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5826
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557351
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/557351 | Semiconductor device with step-like wiring layers and manufacturing method thereof | Aug 29, 2019 | Issued |
Array
(
[id] => 15532627
[patent_doc_number] => 20200058619
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-20
[patent_title] => RADIO FREQUENCY SYSTEM-IN-PACKAGE WITH STACKED CLOCKING CRYSTAL
[patent_app_type] => utility
[patent_app_number] => 16/555077
[patent_app_country] => US
[patent_app_date] => 2019-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13386
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16555077
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/555077 | Radio frequency system-in-package with stacked clocking crystal | Aug 28, 2019 | Issued |
Array
(
[id] => 15564581
[patent_doc_number] => 20200066702
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-27
[patent_title] => SYSTEM IN A PACKAGE CONNECTORS
[patent_app_type] => utility
[patent_app_number] => 16/549841
[patent_app_country] => US
[patent_app_date] => 2019-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9904
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16549841
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/549841 | System in a package connectors | Aug 22, 2019 | Issued |
Array
(
[id] => 15598545
[patent_doc_number] => 20200075807
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-05
[patent_title] => SEMICONDUCTOR STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 16/549822
[patent_app_country] => US
[patent_app_date] => 2019-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6501
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16549822
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/549822 | Semiconductor structure having a bridge layer | Aug 22, 2019 | Issued |
Array
(
[id] => 16638021
[patent_doc_number] => 10916536
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-02-09
[patent_title] => ESD protection device for a MEMS element
[patent_app_type] => utility
[patent_app_number] => 16/549379
[patent_app_country] => US
[patent_app_date] => 2019-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2386
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16549379
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/549379 | ESD protection device for a MEMS element | Aug 22, 2019 | Issued |
Array
(
[id] => 17284054
[patent_doc_number] => 11201095
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-12-14
[patent_title] => Chip package having a cover with window
[patent_app_type] => utility
[patent_app_number] => 16/549801
[patent_app_country] => US
[patent_app_date] => 2019-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 5208
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16549801
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/549801 | Chip package having a cover with window | Aug 22, 2019 | Issued |
Array
(
[id] => 15807343
[patent_doc_number] => 20200126814
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-23
[patent_title] => SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING SAME
[patent_app_type] => utility
[patent_app_number] => 16/549818
[patent_app_country] => US
[patent_app_date] => 2019-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3460
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16549818
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/549818 | Semiconductor device package for debonding substrate assembly from carrier substrate using light and method of manufacturing same | Aug 22, 2019 | Issued |
Array
(
[id] => 17424340
[patent_doc_number] => 11257802
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-02-22
[patent_title] => Semiconductor device with bonding pads and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/549486
[patent_app_country] => US
[patent_app_date] => 2019-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 5591
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16549486
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/549486 | Semiconductor device with bonding pads and method of manufacturing the same | Aug 22, 2019 | Issued |
Array
(
[id] => 16803470
[patent_doc_number] => 10998427
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-05-04
[patent_title] => Semiconductor device with fin structures and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/544826
[patent_app_country] => US
[patent_app_date] => 2019-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 25
[patent_no_of_words] => 9792
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16544826
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/544826 | Semiconductor device with fin structures and manufacturing method thereof | Aug 18, 2019 | Issued |
Array
(
[id] => 16617532
[patent_doc_number] => 20210036185
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-04
[patent_title] => LIGHT EMITTING DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/524165
[patent_app_country] => US
[patent_app_date] => 2019-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2602
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16524165
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/524165 | Light emitting device | Jul 28, 2019 | Issued |