Search

Alexander O. Williams

Examiner (ID: 4421)

Most Active Art Unit
2826
Art Unit(s)
2508, 2826, 2811
Total Applications
2764
Issued Applications
2318
Pending Applications
64
Abandoned Applications
383

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8944392 [patent_doc_number] => 08497574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-30 [patent_title] => 'High power semiconductor package with conductive clips and flip chip driver IC' [patent_app_type] => utility [patent_app_number] => 13/095650 [patent_app_country] => US [patent_app_date] => 2011-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3036 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13095650 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/095650
High power semiconductor package with conductive clips and flip chip driver IC Apr 26, 2011 Issued
Array ( [id] => 8474541 [patent_doc_number] => 20120273948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-01 [patent_title] => 'INTEGRATED CIRCUIT STRUCTURE INCLUDING A COPPER-ALUMINUM INTERCONNECT AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/094944 [patent_app_country] => US [patent_app_date] => 2011-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2700 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13094944 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/094944
INTEGRATED CIRCUIT STRUCTURE INCLUDING A COPPER-ALUMINUM INTERCONNECT AND METHOD FOR FABRICATING THE SAME Apr 26, 2011 Abandoned
Array ( [id] => 8982688 [patent_doc_number] => 08513808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Semiconductor device having trench-isolated element formation region' [patent_app_type] => utility [patent_app_number] => 13/095735 [patent_app_country] => US [patent_app_date] => 2011-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 11751 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13095735 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/095735
Semiconductor device having trench-isolated element formation region Apr 26, 2011 Issued
Array ( [id] => 8944391 [patent_doc_number] => 08497573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-30 [patent_title] => 'High power semiconductor package with conductive clip on multiple transistors' [patent_app_type] => utility [patent_app_number] => 13/095247 [patent_app_country] => US [patent_app_date] => 2011-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2623 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13095247 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/095247
High power semiconductor package with conductive clip on multiple transistors Apr 26, 2011 Issued
Array ( [id] => 8789015 [patent_doc_number] => 20130105984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-02 [patent_title] => 'SEMICONDUCTOR DEVICE PACKAGE ADAPTER' [patent_app_type] => utility [patent_app_number] => 13/643436 [patent_app_country] => US [patent_app_date] => 2011-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7890 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13643436 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/643436
Semiconductor device package adapter Apr 24, 2011 Issued
Array ( [id] => 6105854 [patent_doc_number] => 20110186839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-04 [patent_title] => 'Method and System for Hermetically Sealing Packages for Optics' [patent_app_type] => utility [patent_app_number] => 13/086352 [patent_app_country] => US [patent_app_date] => 2011-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5527 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20110186839.pdf [firstpage_image] =>[orig_patent_app_number] => 13086352 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/086352
Method and system for hermetically sealing packages for optics Apr 12, 2011 Issued
Array ( [id] => 8329145 [patent_doc_number] => 08237232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-07 [patent_title] => 'Semiconductor device including a DC-DC converter having a metal plate' [patent_app_type] => utility [patent_app_number] => 13/050313 [patent_app_country] => US [patent_app_date] => 2011-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 70 [patent_figures_cnt] => 99 [patent_no_of_words] => 38527 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 473 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13050313 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/050313
Semiconductor device including a DC-DC converter having a metal plate Mar 16, 2011 Issued
Array ( [id] => 6042422 [patent_doc_number] => 20110204499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'SEMICONDUCTOR DEVICE ASSEMBLIES' [patent_app_type] => utility [patent_app_number] => 13/043037 [patent_app_country] => US [patent_app_date] => 2011-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7475 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20110204499.pdf [firstpage_image] =>[orig_patent_app_number] => 13043037 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/043037
Semiconductor device assemblies Mar 7, 2011 Issued
Array ( [id] => 8818510 [patent_doc_number] => 20130119555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-16 [patent_title] => 'Through-Package-Via (TPV) Structures On Inorganic Interposer And Methods For Fabricating Same' [patent_app_type] => utility [patent_app_number] => 13/582453 [patent_app_country] => US [patent_app_date] => 2011-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 7024 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13582453 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/582453
Through-package-via (TPV) structures on inorganic interposer and methods for fabricating same Mar 2, 2011 Issued
Array ( [id] => 8738841 [patent_doc_number] => 08410614 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-02 [patent_title] => 'Semiconductor device having a semiconductor element buried in an insulating layer and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/034021 [patent_app_country] => US [patent_app_date] => 2011-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 22 [patent_no_of_words] => 9103 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13034021 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/034021
Semiconductor device having a semiconductor element buried in an insulating layer and method of manufacturing the same Feb 23, 2011 Issued
Array ( [id] => 8356722 [patent_doc_number] => 20120211884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-23 [patent_title] => 'WAFER CHIP SCALE PACKAGE CONNECTION SCHEME' [patent_app_type] => utility [patent_app_number] => 13/033064 [patent_app_country] => US [patent_app_date] => 2011-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4114 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13033064 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/033064
WAFER CHIP SCALE PACKAGE CONNECTION SCHEME Feb 22, 2011 Abandoned
Array ( [id] => 8910062 [patent_doc_number] => 08482130 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-09 [patent_title] => 'Interconnect structure comprising blind vias intended to be metalized' [patent_app_type] => utility [patent_app_number] => 13/031917 [patent_app_country] => US [patent_app_date] => 2011-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 5779 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13031917 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/031917
Interconnect structure comprising blind vias intended to be metalized Feb 21, 2011 Issued
Array ( [id] => 6042444 [patent_doc_number] => 20110204521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'CHIP-SCALE SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/030842 [patent_app_country] => US [patent_app_date] => 2011-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1970 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20110204521.pdf [firstpage_image] =>[orig_patent_app_number] => 13030842 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/030842
CHIP-SCALE SEMICONDUCTOR DEVICE PACKAGE AND METHOD OF MANUFACTURING THE SAME Feb 17, 2011 Abandoned
Array ( [id] => 8690580 [patent_doc_number] => 08390109 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-05 [patent_title] => 'Chip package with plank stack of semiconductor dies' [patent_app_type] => utility [patent_app_number] => 13/029825 [patent_app_country] => US [patent_app_date] => 2011-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 27 [patent_no_of_words] => 9442 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13029825 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/029825
Chip package with plank stack of semiconductor dies Feb 16, 2011 Issued
Array ( [id] => 9154181 [patent_doc_number] => 08587088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-19 [patent_title] => 'Side-mounted controller and methods for making the same' [patent_app_type] => utility [patent_app_number] => 13/030115 [patent_app_country] => US [patent_app_date] => 2011-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 3433 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13030115 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/030115
Side-mounted controller and methods for making the same Feb 16, 2011 Issued
Array ( [id] => 8871175 [patent_doc_number] => 08466554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-18 [patent_title] => 'Electronic device having interconnections, openings, and pads having greater width than the openings' [patent_app_type] => utility [patent_app_number] => 13/028836 [patent_app_country] => US [patent_app_date] => 2011-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 29 [patent_no_of_words] => 11641 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13028836 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/028836
Electronic device having interconnections, openings, and pads having greater width than the openings Feb 15, 2011 Issued
Array ( [id] => 8344862 [patent_doc_number] => 20120205794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'SEMICONDUCTOR CHIP PACKAGE STRUCTURE AND SEMICONDUCTOR CHIP' [patent_app_type] => utility [patent_app_number] => 13/026419 [patent_app_country] => US [patent_app_date] => 2011-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3038 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13026419 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/026419
Semiconductor chip package structure, semiconductor chip and semiconductor chip group Feb 13, 2011 Issued
Array ( [id] => 8499774 [patent_doc_number] => 20120299182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'COPPER BONDING WIRE FOR SEMICONDUCTOR AND BONDING STRUCTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/577199 [patent_app_country] => US [patent_app_date] => 2011-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20283 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13577199 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/577199
Copper bonding wire for semiconductor device and bonding structure thereof Feb 2, 2011 Issued
Array ( [id] => 5996993 [patent_doc_number] => 20110115091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-19 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING GROOVE-SHAPED VIA-HOLE' [patent_app_type] => utility [patent_app_number] => 13/013103 [patent_app_country] => US [patent_app_date] => 2011-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 16231 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20110115091.pdf [firstpage_image] =>[orig_patent_app_number] => 13013103 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/013103
Semiconductor device having groove-shaped pattern Jan 24, 2011 Issued
Array ( [id] => 6052375 [patent_doc_number] => 20110108970 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-12 [patent_title] => 'SEMICONDUCTOR FLIP CHIP PACKAGE HAVING SUBSTANTIALLY NON-COLLAPSIBLE SPACER AND METHOD OF MANUFACTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/006697 [patent_app_country] => US [patent_app_date] => 2011-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5054 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20110108970.pdf [firstpage_image] =>[orig_patent_app_number] => 13006697 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/006697
Semiconductor flip chip package having substantially non-collapsible spacer and method of manufacture thereof Jan 13, 2011 Issued
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