Search

Alexander O. Williams

Examiner (ID: 4421)

Most Active Art Unit
2826
Art Unit(s)
2508, 2826, 2811
Total Applications
2764
Issued Applications
2318
Pending Applications
64
Abandoned Applications
383

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7787819 [patent_doc_number] => 20120049375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'METHOD AND SYSTEM FOR ROUTING ELECTRICAL CONNECTIONS OF SEMICONDUCTOR CHIPS' [patent_app_type] => utility [patent_app_number] => 12/871939 [patent_app_country] => US [patent_app_date] => 2010-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7709 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20120049375.pdf [firstpage_image] =>[orig_patent_app_number] => 12871939 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/871939
Method and system for routing electrical connections of semiconductor chips Aug 30, 2010 Issued
Array ( [id] => 8713850 [patent_doc_number] => 08399992 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Package-on-package type semiconductor package' [patent_app_type] => utility [patent_app_number] => 12/872448 [patent_app_country] => US [patent_app_date] => 2010-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 46 [patent_no_of_words] => 16179 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12872448 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/872448
Package-on-package type semiconductor package Aug 30, 2010 Issued
Array ( [id] => 7787819 [patent_doc_number] => 20120049375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'METHOD AND SYSTEM FOR ROUTING ELECTRICAL CONNECTIONS OF SEMICONDUCTOR CHIPS' [patent_app_type] => utility [patent_app_number] => 12/871939 [patent_app_country] => US [patent_app_date] => 2010-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7709 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20120049375.pdf [firstpage_image] =>[orig_patent_app_number] => 12871939 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/871939
Method and system for routing electrical connections of semiconductor chips Aug 30, 2010 Issued
Array ( [id] => 7787819 [patent_doc_number] => 20120049375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'METHOD AND SYSTEM FOR ROUTING ELECTRICAL CONNECTIONS OF SEMICONDUCTOR CHIPS' [patent_app_type] => utility [patent_app_number] => 12/871939 [patent_app_country] => US [patent_app_date] => 2010-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7709 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20120049375.pdf [firstpage_image] =>[orig_patent_app_number] => 12871939 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/871939
Method and system for routing electrical connections of semiconductor chips Aug 30, 2010 Issued
Array ( [id] => 7787819 [patent_doc_number] => 20120049375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'METHOD AND SYSTEM FOR ROUTING ELECTRICAL CONNECTIONS OF SEMICONDUCTOR CHIPS' [patent_app_type] => utility [patent_app_number] => 12/871939 [patent_app_country] => US [patent_app_date] => 2010-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7709 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20120049375.pdf [firstpage_image] =>[orig_patent_app_number] => 12871939 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/871939
Method and system for routing electrical connections of semiconductor chips Aug 30, 2010 Issued
Array ( [id] => 7787804 [patent_doc_number] => 20120049360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'Semiconductor Package And Method For Making The Same' [patent_app_type] => utility [patent_app_number] => 12/872644 [patent_app_country] => US [patent_app_date] => 2010-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2470 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20120049360.pdf [firstpage_image] =>[orig_patent_app_number] => 12872644 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/872644
Semiconductor package Aug 30, 2010 Issued
Array ( [id] => 8398959 [patent_doc_number] => 08269348 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-18 [patent_title] => 'IC die including RDL capture pads with notch having bonding connectors or its UBM pad over the notch' [patent_app_type] => utility [patent_app_number] => 12/872006 [patent_app_country] => US [patent_app_date] => 2010-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3782 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12872006 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/872006
IC die including RDL capture pads with notch having bonding connectors or its UBM pad over the notch Aug 30, 2010 Issued
Array ( [id] => 5980318 [patent_doc_number] => 20110095425 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'Ball grid array substrate, semiconductor chip package and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/923037 [patent_app_country] => US [patent_app_date] => 2010-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3191 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20110095425.pdf [firstpage_image] =>[orig_patent_app_number] => 12923037 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/923037
Ball grid array substrate with insulating layer and semiconductor chip package Aug 29, 2010 Issued
Array ( [id] => 9312414 [patent_doc_number] => 08653636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-18 [patent_title] => 'Contactless communication medium' [patent_app_type] => utility [patent_app_number] => 13/391966 [patent_app_country] => US [patent_app_date] => 2010-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 8928 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13391966 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/391966
Contactless communication medium Aug 24, 2010 Issued
Array ( [id] => 8757734 [patent_doc_number] => RE044148 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2013-04-16 [patent_title] => 'Semiconductor device having an improved connection arrangement between a semiconductor pellet and base substrate electrodes and a method of manufacture thereof' [patent_app_type] => reissue [patent_app_number] => 12/805447 [patent_app_country] => US [patent_app_date] => 2010-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 10045 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12805447 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/805447
Semiconductor device having an improved connection arrangement between a semiconductor pellet and base substrate electrodes and a method of manufacture thereof Jul 29, 2010 Issued
Array ( [id] => 8224897 [patent_doc_number] => 20120139096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-07 [patent_title] => 'SEMICONDUCTOR MODULE AND COOLING UNIT' [patent_app_type] => utility [patent_app_number] => 13/382621 [patent_app_country] => US [patent_app_date] => 2010-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 10974 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13382621 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/382621
Semiconductor module and cooling unit Jul 27, 2010 Issued
Array ( [id] => 4640011 [patent_doc_number] => 08018038 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-13 [patent_title] => 'IC card with terminals for direct access to internal components' [patent_app_type] => utility [patent_app_number] => 12/835847 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 33 [patent_no_of_words] => 14611 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/018/08018038.pdf [firstpage_image] =>[orig_patent_app_number] => 12835847 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/835847
IC card with terminals for direct access to internal components Jul 13, 2010 Issued
Array ( [id] => 6231347 [patent_doc_number] => 20100264540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-21 [patent_title] => 'IC Package Reducing Wiring Layers on Substrate and Its Carrier' [patent_app_type] => utility [patent_app_number] => 12/825811 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2338 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0264/20100264540.pdf [firstpage_image] =>[orig_patent_app_number] => 12825811 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/825811
IC package reducing wiring layers on substrate and its carrier Jun 28, 2010 Issued
Array ( [id] => 6484843 [patent_doc_number] => 20100258924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-14 [patent_title] => 'PRE-MOLDED CLIP STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/822932 [patent_app_country] => US [patent_app_date] => 2010-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3368 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20100258924.pdf [firstpage_image] =>[orig_patent_app_number] => 12822932 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/822932
Pre-molded clip structure Jun 23, 2010 Issued
Array ( [id] => 6571433 [patent_doc_number] => 20100320598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/813570 [patent_app_country] => US [patent_app_date] => 2010-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7964 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0320/20100320598.pdf [firstpage_image] =>[orig_patent_app_number] => 12813570 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/813570
SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF Jun 10, 2010 Abandoned
Array ( [id] => 6145543 [patent_doc_number] => 20110018144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-27 [patent_title] => 'WIRING BOARD AND SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/813692 [patent_app_country] => US [patent_app_date] => 2010-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 11959 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20110018144.pdf [firstpage_image] =>[orig_patent_app_number] => 12813692 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/813692
Wiring board having piercing linear conductors and semiconductor device using the same Jun 10, 2010 Issued
Array ( [id] => 5948534 [patent_doc_number] => 20110031618 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-10 [patent_title] => 'Bond Pad Design for Reducing the Effect of Package Stress' [patent_app_type] => utility [patent_app_number] => 12/813763 [patent_app_country] => US [patent_app_date] => 2010-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2193 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20110031618.pdf [firstpage_image] =>[orig_patent_app_number] => 12813763 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/813763
Bond pad design for reducing the effect of package stress Jun 10, 2010 Issued
Array ( [id] => 6321471 [patent_doc_number] => 20100244251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-30 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/813024 [patent_app_country] => US [patent_app_date] => 2010-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 13618 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0244/20100244251.pdf [firstpage_image] =>[orig_patent_app_number] => 12813024 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/813024
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME Jun 9, 2010 Abandoned
Array ( [id] => 5932570 [patent_doc_number] => 20110210444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => '3D Semiconductor Package Using An Interposer' [patent_app_type] => utility [patent_app_number] => 12/813212 [patent_app_country] => US [patent_app_date] => 2010-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4372 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20110210444.pdf [firstpage_image] =>[orig_patent_app_number] => 12813212 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/813212
3D semiconductor package interposer with die cavity Jun 9, 2010 Issued
Array ( [id] => 8436012 [patent_doc_number] => 08283784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-09 [patent_title] => 'Method for producing a power semiconductor module, and power semiconductor module comprising a connection device' [patent_app_type] => utility [patent_app_number] => 12/797331 [patent_app_country] => US [patent_app_date] => 2010-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2665 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12797331 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/797331
Method for producing a power semiconductor module, and power semiconductor module comprising a connection device Jun 8, 2010 Issued
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