Search

Alexander O. Williams

Examiner (ID: 4421)

Most Active Art Unit
2826
Art Unit(s)
2508, 2826, 2811
Total Applications
2764
Issued Applications
2318
Pending Applications
64
Abandoned Applications
383

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 112841 [patent_doc_number] => 07719112 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-18 [patent_title] => 'On-chip magnetic components' [patent_app_type] => utility [patent_app_number] => 11/835144 [patent_app_country] => US [patent_app_date] => 2007-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 2801 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/719/07719112.pdf [firstpage_image] =>[orig_patent_app_number] => 11835144 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/835144
On-chip magnetic components Aug 6, 2007 Issued
Array ( [id] => 143222 [patent_doc_number] => 07692299 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-06 [patent_title] => 'Semiconductor apparatus having improved thermal fatigue life' [patent_app_type] => utility [patent_app_number] => 11/834734 [patent_app_country] => US [patent_app_date] => 2007-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 6538 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/692/07692299.pdf [firstpage_image] =>[orig_patent_app_number] => 11834734 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/834734
Semiconductor apparatus having improved thermal fatigue life Aug 6, 2007 Issued
Array ( [id] => 4768762 [patent_doc_number] => 20080054418 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-06 [patent_title] => 'CHIP CARRIER WITH SIGNAL COLLECTION TAPE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/832174 [patent_app_country] => US [patent_app_date] => 2007-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2348 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20080054418.pdf [firstpage_image] =>[orig_patent_app_number] => 11832174 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/832174
CHIP CARRIER WITH SIGNAL COLLECTION TAPE AND FABRICATION METHOD THEREOF Jul 31, 2007 Abandoned
Array ( [id] => 5358152 [patent_doc_number] => 20090032946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-05 [patent_title] => 'INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/832404 [patent_app_country] => US [patent_app_date] => 2007-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5786 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20090032946.pdf [firstpage_image] =>[orig_patent_app_number] => 11832404 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/832404
INTEGRATED CIRCUIT Jul 31, 2007 Abandoned
Array ( [id] => 4654965 [patent_doc_number] => 20080023825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-31 [patent_title] => 'Multi-die DC-DC Boost Power Converter with Efficient Packaging' [patent_app_type] => utility [patent_app_number] => 11/830951 [patent_app_country] => US [patent_app_date] => 2007-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3880 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20080023825.pdf [firstpage_image] =>[orig_patent_app_number] => 11830951 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/830951
Multi-die DC-DC boost power converter with efficient packaging Jul 30, 2007 Issued
Array ( [id] => 5358175 [patent_doc_number] => 20090032969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-05 [patent_title] => 'Arrangement of Integrated Circuit Dice and Method for Fabricating Same' [patent_app_type] => utility [patent_app_number] => 11/830614 [patent_app_country] => US [patent_app_date] => 2007-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5921 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20090032969.pdf [firstpage_image] =>[orig_patent_app_number] => 11830614 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/830614
Arrangement of stacked integrated circuit dice having a direct electrical connection Jul 29, 2007 Issued
Array ( [id] => 4685679 [patent_doc_number] => 20080029860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-07 [patent_title] => 'SEMICONDUCTOR DEVICE WITH INTERNAL HEAT SINK' [patent_app_type] => utility [patent_app_number] => 11/829084 [patent_app_country] => US [patent_app_date] => 2007-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3329 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20080029860.pdf [firstpage_image] =>[orig_patent_app_number] => 11829084 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/829084
SEMICONDUCTOR DEVICE WITH INTERNAL HEAT SINK Jul 26, 2007 Abandoned
Array ( [id] => 7590954 [patent_doc_number] => 07663211 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-16 [patent_title] => 'Dual side cooling integrated power device package and module with a clip attached to a leadframe in the package and the module and methods of manufacture' [patent_app_type] => utility [patent_app_number] => 11/829793 [patent_app_country] => US [patent_app_date] => 2007-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 41 [patent_no_of_words] => 5875 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/663/07663211.pdf [firstpage_image] =>[orig_patent_app_number] => 11829793 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/829793
Dual side cooling integrated power device package and module with a clip attached to a leadframe in the package and the module and methods of manufacture Jul 26, 2007 Issued
Array ( [id] => 174242 [patent_doc_number] => 07659622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-09 [patent_title] => 'Trace design to minimize electromigration damage to solder bumps' [patent_app_type] => utility [patent_app_number] => 11/779833 [patent_app_country] => US [patent_app_date] => 2007-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 27 [patent_no_of_words] => 5943 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/659/07659622.pdf [firstpage_image] =>[orig_patent_app_number] => 11779833 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/779833
Trace design to minimize electromigration damage to solder bumps Jul 17, 2007 Issued
Array ( [id] => 103148 [patent_doc_number] => 07728429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-01 [patent_title] => 'Semiconductor device having recessed connector portions' [patent_app_type] => utility [patent_app_number] => 11/826673 [patent_app_country] => US [patent_app_date] => 2007-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5303 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/728/07728429.pdf [firstpage_image] =>[orig_patent_app_number] => 11826673 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/826673
Semiconductor device having recessed connector portions Jul 16, 2007 Issued
Array ( [id] => 1077336 [patent_doc_number] => 07615853 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-10 [patent_title] => 'Chip-stacked package structure having leadframe with multi-piece bus bar' [patent_app_type] => utility [patent_app_number] => 11/826413 [patent_app_country] => US [patent_app_date] => 2007-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 26 [patent_no_of_words] => 7468 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/615/07615853.pdf [firstpage_image] =>[orig_patent_app_number] => 11826413 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/826413
Chip-stacked package structure having leadframe with multi-piece bus bar Jul 15, 2007 Issued
Array ( [id] => 7590984 [patent_doc_number] => 07663163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-16 [patent_title] => 'Semiconductor with reduced pad pitch' [patent_app_type] => utility [patent_app_number] => 11/777033 [patent_app_country] => US [patent_app_date] => 2007-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 6580 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/663/07663163.pdf [firstpage_image] =>[orig_patent_app_number] => 11777033 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/777033
Semiconductor with reduced pad pitch Jul 11, 2007 Issued
Array ( [id] => 4564496 [patent_doc_number] => 07838985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-23 [patent_title] => 'Semiconductor assembly that includes a power semiconductor die located on a cell defined by first and second patterned polymer layers' [patent_app_type] => utility [patent_app_number] => 11/827593 [patent_app_country] => US [patent_app_date] => 2007-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 33 [patent_no_of_words] => 3565 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/838/07838985.pdf [firstpage_image] =>[orig_patent_app_number] => 11827593 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/827593
Semiconductor assembly that includes a power semiconductor die located on a cell defined by first and second patterned polymer layers Jul 11, 2007 Issued
Array ( [id] => 4800497 [patent_doc_number] => 20080012084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-17 [patent_title] => 'Image sensor package and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/826124 [patent_app_country] => US [patent_app_date] => 2007-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3574 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20080012084.pdf [firstpage_image] =>[orig_patent_app_number] => 11826124 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/826124
Image sensor package and method of fabricating the same Jul 11, 2007 Abandoned
Array ( [id] => 315212 [patent_doc_number] => 07525183 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-28 [patent_title] => 'Surface mount multichip devices' [patent_app_type] => utility [patent_app_number] => 11/825991 [patent_app_country] => US [patent_app_date] => 2007-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5116 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/525/07525183.pdf [firstpage_image] =>[orig_patent_app_number] => 11825991 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/825991
Surface mount multichip devices Jul 9, 2007 Issued
Array ( [id] => 270894 [patent_doc_number] => 07564130 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-07-21 [patent_title] => 'Power micro surface-mount device package' [patent_app_type] => utility [patent_app_number] => 11/774473 [patent_app_country] => US [patent_app_date] => 2007-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4198 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/564/07564130.pdf [firstpage_image] =>[orig_patent_app_number] => 11774473 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/774473
Power micro surface-mount device package Jul 5, 2007 Issued
Array ( [id] => 5223022 [patent_doc_number] => 20070252288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-01 [patent_title] => 'SEMICONDUCTOR MODULE AND METHOD FOR FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/772901 [patent_app_country] => US [patent_app_date] => 2007-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2288 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0252/20070252288.pdf [firstpage_image] =>[orig_patent_app_number] => 11772901 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/772901
SEMICONDUCTOR MODULE AND METHOD FOR FORMING THE SAME Jul 2, 2007 Abandoned
Array ( [id] => 4870741 [patent_doc_number] => 20080197475 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'Packaging conductive structure and method for forming the same' [patent_app_type] => utility [patent_app_number] => 11/822113 [patent_app_country] => US [patent_app_date] => 2007-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2351 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20080197475.pdf [firstpage_image] =>[orig_patent_app_number] => 11822113 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/822113
Packaging conductive structure for a semiconductor substrate having a metallic layer Jul 1, 2007 Issued
Array ( [id] => 5223009 [patent_doc_number] => 20070252275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-01 [patent_title] => 'CHIP PACKAGING STRUCTURE' [patent_app_type] => utility [patent_app_number] => 11/772247 [patent_app_country] => US [patent_app_date] => 2007-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3151 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0252/20070252275.pdf [firstpage_image] =>[orig_patent_app_number] => 11772247 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/772247
CHIP PACKAGING STRUCTURE Jul 1, 2007 Abandoned
Array ( [id] => 5346184 [patent_doc_number] => 20090001545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM WITH SIDE SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 11/772044 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3924 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20090001545.pdf [firstpage_image] =>[orig_patent_app_number] => 11772044 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/772044
Integrated circuit package system with side substrate having a top layer Jun 28, 2007 Issued
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