Search

Alexander S. Thomas

Examiner (ID: 1854, Phone: (571)272-1502 , Office: P/1783 )

Most Active Art Unit
1783
Art Unit(s)
1504, 1506, 1772, 1773, 1508, 1721, 1315, 1794, 1783, 2899
Total Applications
3961
Issued Applications
3043
Pending Applications
87
Abandoned Applications
838

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 879811 [patent_doc_number] => 07354837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-08 [patent_title] => 'Fabrication method for single and dual gate spacers on a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/217369 [patent_app_country] => US [patent_app_date] => 2005-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 1598 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/354/07354837.pdf [firstpage_image] =>[orig_patent_app_number] => 11217369 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/217369
Fabrication method for single and dual gate spacers on a semiconductor device Sep 1, 2005 Issued
Menu