Search

Alexander Sofocleous

Examiner (ID: 721)

Most Active Art Unit
2824
Art Unit(s)
2825, 2824, 2895
Total Applications
473
Issued Applications
387
Pending Applications
11
Abandoned Applications
76

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 591952 [patent_doc_number] => 07450418 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-11-11 [patent_title] => 'Non-volatile memory and operating method thereof' [patent_app_type] => utility [patent_app_number] => 11/403437 [patent_app_country] => US [patent_app_date] => 2006-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 11482 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/450/07450418.pdf [firstpage_image] =>[orig_patent_app_number] => 11403437 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/403437
Non-volatile memory and operating method thereof Apr 11, 2006 Issued
Array ( [id] => 5078165 [patent_doc_number] => 20070121389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-31 [patent_title] => 'MEMORY INTERFACE TO BRIDGE MEMORY BUSES' [patent_app_type] => utility [patent_app_number] => 11/277650 [patent_app_country] => US [patent_app_date] => 2006-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5312 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20070121389.pdf [firstpage_image] =>[orig_patent_app_number] => 11277650 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/277650
Memory interface to bridge memory buses Mar 27, 2006 Issued
Array ( [id] => 674405 [patent_doc_number] => 07092272 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-08-15 [patent_title] => 'Mechanical memory' [patent_app_type] => utility [patent_app_number] => 11/389738 [patent_app_country] => US [patent_app_date] => 2006-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 10512 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/092/07092272.pdf [firstpage_image] =>[orig_patent_app_number] => 11389738 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/389738
Mechanical memory Mar 26, 2006 Issued
Array ( [id] => 4969858 [patent_doc_number] => 20070109860 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'SINGLE-POLY NON-VOLATILE MEMORY DEVICE AND ITS OPERATION METHOD' [patent_app_type] => utility [patent_app_number] => 11/277365 [patent_app_country] => US [patent_app_date] => 2006-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5028 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20070109860.pdf [firstpage_image] =>[orig_patent_app_number] => 11277365 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/277365
SINGLE-POLY NON-VOLATILE MEMORY DEVICE AND ITS OPERATION METHOD Mar 23, 2006 Abandoned
Array ( [id] => 338965 [patent_doc_number] => 07505310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-17 [patent_title] => 'Method of configuring superconducting random access memory, device structure of the same, and superconducting drive circuit' [patent_app_type] => utility [patent_app_number] => 11/374028 [patent_app_country] => US [patent_app_date] => 2006-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 27019 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/505/07505310.pdf [firstpage_image] =>[orig_patent_app_number] => 11374028 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/374028
Method of configuring superconducting random access memory, device structure of the same, and superconducting drive circuit Mar 13, 2006 Issued
Array ( [id] => 5758665 [patent_doc_number] => 20060209610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-21 [patent_title] => 'Semiconductor memory and method for analyzing failure of semiconductor memory' [patent_app_type] => utility [patent_app_number] => 11/373179 [patent_app_country] => US [patent_app_date] => 2006-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2294 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20060209610.pdf [firstpage_image] =>[orig_patent_app_number] => 11373179 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/373179
Semiconductor memory and method for analyzing failure of semiconductor memory Mar 12, 2006 Abandoned
Array ( [id] => 5751490 [patent_doc_number] => 20060220639 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'Fault tolerant non volatile memories and methods' [patent_app_type] => utility [patent_app_number] => 11/372438 [patent_app_country] => US [patent_app_date] => 2006-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5248 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20060220639.pdf [firstpage_image] =>[orig_patent_app_number] => 11372438 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/372438
Fault tolerant non volatile memories and methods Mar 8, 2006 Issued
Array ( [id] => 5856413 [patent_doc_number] => 20060227627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'Buffer component for a memory module, and a memory module and a memory system having such buffer component' [patent_app_type] => utility [patent_app_number] => 11/368267 [patent_app_country] => US [patent_app_date] => 2006-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4947 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20060227627.pdf [firstpage_image] =>[orig_patent_app_number] => 11368267 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/368267
Buffer component for a memory module, and a memory module and a memory system having such buffer component Mar 2, 2006 Issued
Array ( [id] => 594416 [patent_doc_number] => 07443719 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-28 [patent_title] => 'Superconducting circuit for high-speed lookup table' [patent_app_type] => utility [patent_app_number] => 11/360749 [patent_app_country] => US [patent_app_date] => 2006-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 3777 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/443/07443719.pdf [firstpage_image] =>[orig_patent_app_number] => 11360749 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/360749
Superconducting circuit for high-speed lookup table Feb 22, 2006 Issued
Array ( [id] => 5111696 [patent_doc_number] => 20070195611 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-23 [patent_title] => 'Programmable structure, a memory, a display and a method for reading data from a memory cell' [patent_app_type] => utility [patent_app_number] => 11/360149 [patent_app_country] => US [patent_app_date] => 2006-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7234 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20070195611.pdf [firstpage_image] =>[orig_patent_app_number] => 11360149 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/360149
Programmable structure, a memory, a display and a method for reading data from a memory cell Feb 22, 2006 Abandoned
Array ( [id] => 5625405 [patent_doc_number] => 20060263910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Data recording medium including ferroelectric layer and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/355968 [patent_app_country] => US [patent_app_date] => 2006-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4303 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20060263910.pdf [firstpage_image] =>[orig_patent_app_number] => 11355968 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/355968
Data recording medium including ferroelectric layer and method of manufacturing the same Feb 16, 2006 Abandoned
Array ( [id] => 233784 [patent_doc_number] => 07599217 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-06 [patent_title] => 'Memory cell device and manufacturing method' [patent_app_type] => utility [patent_app_number] => 11/357902 [patent_app_country] => US [patent_app_date] => 2006-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4698 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/599/07599217.pdf [firstpage_image] =>[orig_patent_app_number] => 11357902 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/357902
Memory cell device and manufacturing method Feb 16, 2006 Issued
Array ( [id] => 5067948 [patent_doc_number] => 20070189049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-16 [patent_title] => 'Semiconductor memory module' [patent_app_type] => utility [patent_app_number] => 11/355649 [patent_app_country] => US [patent_app_date] => 2006-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4620 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20070189049.pdf [firstpage_image] =>[orig_patent_app_number] => 11355649 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/355649
Semiconductor memory module Feb 15, 2006 Abandoned
Array ( [id] => 5176373 [patent_doc_number] => 20070177432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-02 [patent_title] => 'Phase change memory latch' [patent_app_type] => utility [patent_app_number] => 11/341983 [patent_app_country] => US [patent_app_date] => 2006-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3346 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20070177432.pdf [firstpage_image] =>[orig_patent_app_number] => 11341983 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/341983
Phase change memory latch Jan 26, 2006 Issued
Array ( [id] => 850397 [patent_doc_number] => 07382643 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-03 [patent_title] => 'Magnetoresistive effect element and magnetic memory device' [patent_app_type] => utility [patent_app_number] => 11/338889 [patent_app_country] => US [patent_app_date] => 2006-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 26 [patent_no_of_words] => 13196 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/382/07382643.pdf [firstpage_image] =>[orig_patent_app_number] => 11338889 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/338889
Magnetoresistive effect element and magnetic memory device Jan 24, 2006 Issued
Array ( [id] => 5050183 [patent_doc_number] => 20070030727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Method for switching magnetic moment in magnetoresistive random access memory with low current' [patent_app_type] => utility [patent_app_number] => 11/338653 [patent_app_country] => US [patent_app_date] => 2006-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11159 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20070030727.pdf [firstpage_image] =>[orig_patent_app_number] => 11338653 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/338653
Method for switching magnetic moment in magnetoresistive random access memory with low current Jan 24, 2006 Issued
Array ( [id] => 4865290 [patent_doc_number] => 20080144349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-19 [patent_title] => 'Memory Device, Semiconductor Device, and Driving Method Thereof' [patent_app_type] => utility [patent_app_number] => 11/883027 [patent_app_country] => US [patent_app_date] => 2006-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 20207 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0144/20080144349.pdf [firstpage_image] =>[orig_patent_app_number] => 11883027 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/883027
Memory device, semiconductor device, and driving method therof Jan 23, 2006 Issued
Array ( [id] => 5675956 [patent_doc_number] => 20060181311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Circuit for generating an internal enabling signal for an output buffer of a memory' [patent_app_type] => utility [patent_app_number] => 11/337030 [patent_app_country] => US [patent_app_date] => 2006-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1231 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20060181311.pdf [firstpage_image] =>[orig_patent_app_number] => 11337030 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/337030
Circuit for generating an internal enabling signal for an output buffer of a memory Jan 19, 2006 Issued
Array ( [id] => 198843 [patent_doc_number] => 07639524 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-29 [patent_title] => 'Multi-bit nonvolatile memory devices and methods of operating the same' [patent_app_type] => utility [patent_app_number] => 11/335618 [patent_app_country] => US [patent_app_date] => 2006-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4699 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/639/07639524.pdf [firstpage_image] =>[orig_patent_app_number] => 11335618 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/335618
Multi-bit nonvolatile memory devices and methods of operating the same Jan 19, 2006 Issued
Array ( [id] => 5624081 [patent_doc_number] => 20060262586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Memory module with a circuit providing load isolation and memory domain translation' [patent_app_type] => utility [patent_app_number] => 11/335875 [patent_app_country] => US [patent_app_date] => 2006-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 20076 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20060262586.pdf [firstpage_image] =>[orig_patent_app_number] => 11335875 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/335875
Memory module with a circuit providing load isolation and memory domain translation Jan 18, 2006 Issued
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