
Alexander Sofocleous
Examiner (ID: 721)
| Most Active Art Unit | 2824 |
| Art Unit(s) | 2825, 2824, 2895 |
| Total Applications | 473 |
| Issued Applications | 387 |
| Pending Applications | 11 |
| Abandoned Applications | 76 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6968
[patent_doc_number] => 07813160
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-10-12
[patent_title] => 'Nanocrystal quantum dot memory devices'
[patent_app_type] => utility
[patent_app_number] => 11/329471
[patent_app_country] => US
[patent_app_date] => 2006-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 30
[patent_no_of_words] => 9996
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 11
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/813/07813160.pdf
[firstpage_image] =>[orig_patent_app_number] => 11329471
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/329471 | Nanocrystal quantum dot memory devices | Jan 10, 2006 | Issued |
Array
(
[id] => 5217497
[patent_doc_number] => 20070158808
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-12
[patent_title] => 'Multiple chip module and package stacking method for storage devices'
[patent_app_type] => utility
[patent_app_number] => 11/322442
[patent_app_country] => US
[patent_app_date] => 2005-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 5488
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0158/20070158808.pdf
[firstpage_image] =>[orig_patent_app_number] => 11322442
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/322442 | Multiple chip module and package stacking for storage devices | Dec 28, 2005 | Issued |
Array
(
[id] => 225868
[patent_doc_number] => 07606056
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-10-20
[patent_title] => 'Process for manufacturing a phase change memory array in Cu-damascene technology and phase change memory array thereby manufactured'
[patent_app_type] => utility
[patent_app_number] => 11/317622
[patent_app_country] => US
[patent_app_date] => 2005-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 3451
[patent_no_of_claims] => 28
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[patent_words_short_claim] => 139
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/606/07606056.pdf
[firstpage_image] =>[orig_patent_app_number] => 11317622
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/317622 | Process for manufacturing a phase change memory array in Cu-damascene technology and phase change memory array thereby manufactured | Dec 21, 2005 | Issued |
Array
(
[id] => 588529
[patent_doc_number] => 07457177
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-11-25
[patent_title] => 'Random access memory including circuit to compress comparison results'
[patent_app_type] => utility
[patent_app_number] => 11/314605
[patent_app_country] => US
[patent_app_date] => 2005-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 11894
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 7
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/457/07457177.pdf
[firstpage_image] =>[orig_patent_app_number] => 11314605
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/314605 | Random access memory including circuit to compress comparison results | Dec 20, 2005 | Issued |
Array
(
[id] => 5116806
[patent_doc_number] => 20070138520
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-21
[patent_title] => 'Ferroelectric passive memory cell, device and method of manufacture thereof'
[patent_app_type] => utility
[patent_app_number] => 11/313153
[patent_app_country] => US
[patent_app_date] => 2005-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 15494
[patent_no_of_claims] => 45
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0138/20070138520.pdf
[firstpage_image] =>[orig_patent_app_number] => 11313153
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/313153 | Ferroelectric passive memory cell, device and method of manufacture thereof | Dec 19, 2005 | Issued |
Array
(
[id] => 4435840
[patent_doc_number] => 07969762
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-06-28
[patent_title] => 'Spintronic device with control by domain wall displacement induced by a current of spin-polarized carriers'
[patent_app_type] => utility
[patent_app_number] => 11/721950
[patent_app_country] => US
[patent_app_date] => 2005-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 4642
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/969/07969762.pdf
[firstpage_image] =>[orig_patent_app_number] => 11721950
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/721950 | Spintronic device with control by domain wall displacement induced by a current of spin-polarized carriers | Dec 13, 2005 | Issued |
Array
(
[id] => 906038
[patent_doc_number] => 07336527
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-02-26
[patent_title] => 'Electromechanical storage device'
[patent_app_type] => utility
[patent_app_number] => 11/300709
[patent_app_country] => US
[patent_app_date] => 2005-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 35
[patent_no_of_words] => 8873
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/336/07336527.pdf
[firstpage_image] =>[orig_patent_app_number] => 11300709
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/300709 | Electromechanical storage device | Dec 13, 2005 | Issued |
Array
(
[id] => 244281
[patent_doc_number] => 07590020
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-09-15
[patent_title] => 'Semiconductor memory, semiconductor memory system and method of monitoring dynamic temperature thereof'
[patent_app_type] => utility
[patent_app_number] => 11/302439
[patent_app_country] => US
[patent_app_date] => 2005-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5491
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/590/07590020.pdf
[firstpage_image] =>[orig_patent_app_number] => 11302439
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/302439 | Semiconductor memory, semiconductor memory system and method of monitoring dynamic temperature thereof | Dec 13, 2005 | Issued |
Array
(
[id] => 360655
[patent_doc_number] => 07486534
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-02-03
[patent_title] => 'Diode-less array for one-time programmable memory'
[patent_app_type] => utility
[patent_app_number] => 11/297529
[patent_app_country] => US
[patent_app_date] => 2005-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 4137
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[pdf_file] => patents/07/486/07486534.pdf
[firstpage_image] =>[orig_patent_app_number] => 11297529
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/297529 | Diode-less array for one-time programmable memory | Dec 7, 2005 | Issued |
Array
(
[id] => 338986
[patent_doc_number] => 07505331
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-03-17
[patent_title] => 'Programmable logic device with differential communications support'
[patent_app_type] => utility
[patent_app_number] => 11/286165
[patent_app_country] => US
[patent_app_date] => 2005-11-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[patent_no_of_words] => 9272
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[pdf_file] => patents/07/505/07505331.pdf
[firstpage_image] =>[orig_patent_app_number] => 11286165
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/286165 | Programmable logic device with differential communications support | Nov 22, 2005 | Issued |
Array
(
[id] => 818412
[patent_doc_number] => 07411853
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-08-12
[patent_title] => 'Volatile memory elements with elevated power supply levels for programmable logic device integrated circuits'
[patent_app_type] => utility
[patent_app_number] => 11/282437
[patent_app_country] => US
[patent_app_date] => 2005-11-17
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/411/07411853.pdf
[firstpage_image] =>[orig_patent_app_number] => 11282437
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/282437 | Volatile memory elements with elevated power supply levels for programmable logic device integrated circuits | Nov 16, 2005 | Issued |
Array
(
[id] => 5657655
[patent_doc_number] => 20060143391
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-29
[patent_title] => 'Computer device'
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[patent_app_number] => 11/280937
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[pdf_file] => publications/A1/0143/20060143391.pdf
[firstpage_image] =>[orig_patent_app_number] => 11280937
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/280937 | Computer device | Nov 14, 2005 | Abandoned |
Array
(
[id] => 5660247
[patent_doc_number] => 20060250843
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-09
[patent_title] => 'Non-volatile-shadow latch using a nanotube switch'
[patent_app_type] => utility
[patent_app_number] => 11/280599
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[pdf_file] => publications/A1/0250/20060250843.pdf
[firstpage_image] =>[orig_patent_app_number] => 11280599
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/280599 | Non-volatile-shadow latch using a nanotube switch | Nov 14, 2005 | Issued |
Array
(
[id] => 279026
[patent_doc_number] => 07558108
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-07-07
[patent_title] => '3-bit NROM flash and method of operating same'
[patent_app_type] => utility
[patent_app_number] => 11/265767
[patent_app_country] => US
[patent_app_date] => 2005-11-01
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[pdf_file] => patents/07/558/07558108.pdf
[firstpage_image] =>[orig_patent_app_number] => 11265767
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/265767 | 3-bit NROM flash and method of operating same | Oct 31, 2005 | Issued |
Array
(
[id] => 5039387
[patent_doc_number] => 20070091669
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-26
[patent_title] => 'Giant magneto-resistive static read RAM memory architecture'
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[firstpage_image] =>[orig_patent_app_number] => 11257327
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/257327 | Complementary giant magneto-resistive memory with full-turn word line | Oct 23, 2005 | Issued |
Array
(
[id] => 586085
[patent_doc_number] => 07460431
[patent_country] => US
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[patent_title] => 'Implementation of double data rate embedded memory in programmable devices'
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[pdf_file] => patents/07/460/07460431.pdf
[firstpage_image] =>[orig_patent_app_number] => 11242693
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/242693 | Implementation of double data rate embedded memory in programmable devices | Oct 2, 2005 | Issued |
Array
(
[id] => 850411
[patent_doc_number] => 07382648
[patent_country] => US
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[patent_title] => 'Nanomechanical switching device'
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[patent_app_number] => 11/239355
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[firstpage_image] =>[orig_patent_app_number] => 11239355
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/239355 | Nanomechanical switching device | Sep 29, 2005 | Issued |
Array
(
[id] => 588987
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[patent_title] => 'Semiconductor memory device with stacked control transistors'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/238381 | Semiconductor memory device with stacked control transistors | Sep 28, 2005 | Issued |
Array
(
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[patent_doc_number] => 20070071445
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[patent_issue_date] => 2007-03-29
[patent_title] => 'Method, apparatus and system for N-dimensional sparse memory using serial optical memory'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/239535 | Method, apparatus and system for N-dimensional sparse memory using serial optical memory | Sep 27, 2005 | Issued |
Array
(
[id] => 5193303
[patent_doc_number] => 20070081785
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[patent_title] => 'Method, apparatus and system for global shared memory using serial optical memory'
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0081/20070081785.pdf
[firstpage_image] =>[orig_patent_app_number] => 11238490
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/238490 | Method, apparatus and system for global shared memory using serial optical memory | Sep 27, 2005 | Issued |