
Alexander Sofocleous
Examiner (ID: 721)
| Most Active Art Unit | 2824 |
| Art Unit(s) | 2825, 2824, 2895 |
| Total Applications | 473 |
| Issued Applications | 387 |
| Pending Applications | 11 |
| Abandoned Applications | 76 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5819172
[patent_doc_number] => 20060023485
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-02-02
[patent_title] => 'Ferroelectric memory device and electronic apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/170682
[patent_app_country] => US
[patent_app_date] => 2005-06-29
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[patent_no_of_words] => 10225
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[pdf_file] => publications/A1/0023/20060023485.pdf
[firstpage_image] =>[orig_patent_app_number] => 11170682
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/170682 | Ferroelectric memory device and electronic apparatus | Jun 28, 2005 | Issued |
Array
(
[id] => 512161
[patent_doc_number] => 07203103
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-04-10
[patent_title] => 'Ferroelectric memory device and electronic apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/170671
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[pdf_file] => patents/07/203/07203103.pdf
[firstpage_image] =>[orig_patent_app_number] => 11170671
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/170671 | Ferroelectric memory device and electronic apparatus | Jun 28, 2005 | Issued |
Array
(
[id] => 5671400
[patent_doc_number] => 20060176754
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-10
[patent_title] => 'Flat cell read only memory using common contacts for bit lines and virtual ground lines'
[patent_app_type] => utility
[patent_app_number] => 11/168515
[patent_app_country] => US
[patent_app_date] => 2005-06-29
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[pdf_file] => publications/A1/0176/20060176754.pdf
[firstpage_image] =>[orig_patent_app_number] => 11168515
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/168515 | Flat cell read only memory using common contacts for bit lines and virtual ground lines | Jun 28, 2005 | Issued |
Array
(
[id] => 897842
[patent_doc_number] => 07342838
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-03-11
[patent_title] => 'Programmable logic device with a double data rate SDRAM interface'
[patent_app_type] => utility
[patent_app_number] => 11/165853
[patent_app_country] => US
[patent_app_date] => 2005-06-24
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 4174
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[pdf_file] => patents/07/342/07342838.pdf
[firstpage_image] =>[orig_patent_app_number] => 11165853
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/165853 | Programmable logic device with a double data rate SDRAM interface | Jun 23, 2005 | Issued |
Array
(
[id] => 5600938
[patent_doc_number] => 20060291283
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-28
[patent_title] => 'Redundant memory content substitution apparatus and method'
[patent_app_type] => utility
[patent_app_number] => 11/165977
[patent_app_country] => US
[patent_app_date] => 2005-06-24
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0291/20060291283.pdf
[firstpage_image] =>[orig_patent_app_number] => 11165977
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/165977 | Redundant memory content substitution apparatus and method | Jun 23, 2005 | Issued |
Array
(
[id] => 409882
[patent_doc_number] => 07286384
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-10-23
[patent_title] => 'Automatic resource assignment in stacked module devices'
[patent_app_type] => utility
[patent_app_number] => 11/158509
[patent_app_country] => US
[patent_app_date] => 2005-06-22
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/286/07286384.pdf
[firstpage_image] =>[orig_patent_app_number] => 11158509
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/158509 | Automatic resource assignment in stacked module devices | Jun 21, 2005 | Issued |
Array
(
[id] => 883086
[patent_doc_number] => 07355899
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-08
[patent_title] => 'Pipe latch circuit of multi-bit prefetch-type semiconductor memory device with improved structure'
[patent_app_type] => utility
[patent_app_number] => 11/158345
[patent_app_country] => US
[patent_app_date] => 2005-06-22
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/355/07355899.pdf
[firstpage_image] =>[orig_patent_app_number] => 11158345
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/158345 | Pipe latch circuit of multi-bit prefetch-type semiconductor memory device with improved structure | Jun 21, 2005 | Issued |
Array
(
[id] => 850412
[patent_doc_number] => 07382649
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-06-03
[patent_title] => 'Nonvolatile semiconductor memory'
[patent_app_type] => utility
[patent_app_number] => 11/148336
[patent_app_country] => US
[patent_app_date] => 2005-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/382/07382649.pdf
[firstpage_image] =>[orig_patent_app_number] => 11148336
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/148336 | Nonvolatile semiconductor memory | Jun 8, 2005 | Issued |
Array
(
[id] => 7057486
[patent_doc_number] => 20050278661
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-12-15
[patent_title] => 'Multi-valued digital information retaining elements and memory devices'
[patent_app_type] => utility
[patent_app_number] => 11/139835
[patent_app_country] => US
[patent_app_date] => 2005-05-27
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0278/20050278661.pdf
[firstpage_image] =>[orig_patent_app_number] => 11139835
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/139835 | Multi-valued digital information retaining elements and memory devices | May 26, 2005 | Issued |
Array
(
[id] => 4582372
[patent_doc_number] => 07830703
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-11-09
[patent_title] => 'Semiconductor device and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/570037
[patent_app_country] => US
[patent_app_date] => 2005-05-25
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[pdf_file] => patents/07/830/07830703.pdf
[firstpage_image] =>[orig_patent_app_number] => 11570037
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/570037 | Semiconductor device and manufacturing method thereof | May 24, 2005 | Issued |
Array
(
[id] => 5607077
[patent_doc_number] => 20060268593
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-30
[patent_title] => 'Read-only memory array with dielectric breakdown programmability'
[patent_app_type] => utility
[patent_app_number] => 11/136981
[patent_app_country] => US
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[pdf_file] => publications/A1/0268/20060268593.pdf
[firstpage_image] =>[orig_patent_app_number] => 11136981
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/136981 | Read-only memory array with dielectric breakdown programmability | May 24, 2005 | Abandoned |
Array
(
[id] => 218126
[patent_doc_number] => 07613039
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-11-03
[patent_title] => 'Arrangement and method for controlling a micromechanical element'
[patent_app_type] => utility
[patent_app_number] => 11/579239
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[pdf_file] => patents/07/613/07613039.pdf
[firstpage_image] =>[orig_patent_app_number] => 11579239
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/579239 | Arrangement and method for controlling a micromechanical element | May 19, 2005 | Issued |
Array
(
[id] => 5600918
[patent_doc_number] => 20060291263
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[patent_issue_date] => 2006-12-28
[patent_title] => 'Memory system and method of accessing memory chips of a memory system'
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[firstpage_image] =>[orig_patent_app_number] => 11128789
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/128789 | Memory system and method of accessing memory chips of a memory system | May 12, 2005 | Issued |
Array
(
[id] => 7220493
[patent_doc_number] => 20050254310
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[patent_title] => 'Nonvolatile semiconductor memory device including ferroelectric semiconductor pattern and methods for writing data in and reading data from the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/120499 | Nonvolatile semiconductor memory device including ferroelectric semiconductor pattern and methods for writing data in and reading data from the same | May 2, 2005 | Abandoned |
Array
(
[id] => 526184
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[patent_issue_date] => 2007-03-20
[patent_title] => 'Signal processing circuits and methods, and memory systems'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/120517 | Signal processing circuits and methods, and memory systems | May 1, 2005 | Issued |
Array
(
[id] => 490159
[patent_doc_number] => 07218566
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[patent_issue_date] => 2007-05-15
[patent_title] => 'Power management of memory via wake/sleep cycles'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/118505 | Power management of memory via wake/sleep cycles | Apr 27, 2005 | Issued |
Array
(
[id] => 5919503
[patent_doc_number] => 20060239068
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[patent_issue_date] => 2006-10-26
[patent_title] => 'Static random access memory cell'
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[firstpage_image] =>[orig_patent_app_number] => 11113365
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/113365 | Static random access memory cell | Apr 20, 2005 | Issued |
Array
(
[id] => 7161221
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[patent_title] => 'Fixed-abrasive chemical-mechanical planarization of titanium nitride'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/104345 | Fixed-abrasive chemical-mechanical planarization of titanium nitride | Apr 11, 2005 | Abandoned |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/098557 | Semiconductor memory with single cell and twin cell refreshing | Apr 4, 2005 | Issued |
Array
(
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[patent_title] => 'Method and system for magnetic shielding in semiconductor integrated circuit'
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[pdf_file] => publications/A1/0229/20060229683.pdf
[firstpage_image] =>[orig_patent_app_number] => 11089969
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/089969 | Method and system for magnetic shielding in semiconductor integrated circuit | Mar 24, 2005 | Issued |