
Alexander Sofocleous
Examiner (ID: 721)
| Most Active Art Unit | 2824 |
| Art Unit(s) | 2825, 2824, 2895 |
| Total Applications | 473 |
| Issued Applications | 387 |
| Pending Applications | 11 |
| Abandoned Applications | 76 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7569191
[patent_doc_number] => 20110289254
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-11-24
[patent_title] => 'CONFIGURABLE DIGITAL AND ANALOG INPUT/OUTPUT INTERFACE IN A MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/192948
[patent_app_country] => US
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[pdf_file] => publications/A1/0289/20110289254.pdf
[firstpage_image] =>[orig_patent_app_number] => 13192948
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/192948 | Configurable digital and analog input/output interface in a memory device | Jul 27, 2011 | Issued |
Array
(
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[patent_doc_number] => 08625360
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[patent_kind] => B2
[patent_issue_date] => 2014-01-07
[patent_title] => 'Semiconductor storage device operative to search for data'
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[patent_app_number] => 13/165457
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[patent_app_date] => 2011-06-21
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Array
(
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[patent_issue_date] => 2013-07-23
[patent_title] => 'Performing logic functions on more than one memory cell within an array of memory cells'
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[patent_app_number] => 13/162753
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[patent_app_date] => 2011-06-17
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Array
(
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[patent_issue_date] => 2011-12-20
[patent_title] => 'Circuit for providing chip-select signals to a plurality of ranks of a DDR memory module'
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Array
(
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Array
(
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/033424 | Memory module and memory system | Feb 22, 2011 | Issued |
Array
(
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[patent_title] => 'Circuit for memory module'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/032470 | Circuit for memory module | Feb 21, 2011 | Issued |
Array
(
[id] => 6078126
[patent_doc_number] => 20110141795
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[patent_issue_date] => 2011-06-16
[patent_title] => 'MULTI-PORT MEMORY BASED ON DRAM CORE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/031080 | Multi-port memory based on DRAM core | Feb 17, 2011 | Issued |
Array
(
[id] => 6060638
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[patent_issue_date] => 2011-08-18
[patent_title] => 'METHOD AND APPARATUS FOR CONTROLLING PAGE BUFFER OF NON-VOLATILE MEMORY DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/028313 | Method and apparatus for controlling page buffer of non-volatile memory device | Feb 15, 2011 | Issued |
Array
(
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[patent_title] => 'Memory cells containing charge-trapping zones'
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Array
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Array
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Array
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Array
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