Search

Alfredo Bermudez Lozada

Examiner (ID: 7463, Phone: (571)272-0877 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2825
Total Applications
617
Issued Applications
490
Pending Applications
86
Abandoned Applications
57

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19108458 [patent_doc_number] => 11961571 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Semiconductor memory device detecting program failure, and method of operating the same [patent_app_type] => utility [patent_app_number] => 17/370725 [patent_app_country] => US [patent_app_date] => 2021-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 10986 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17370725 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/370725
Semiconductor memory device detecting program failure, and method of operating the same Jul 7, 2021 Issued
Array ( [id] => 18432148 [patent_doc_number] => 11677384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Semiconductor integrated circuit with semiconductor layer having indium, zinc, and oxygen [patent_app_type] => utility [patent_app_number] => 17/359940 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 94 [patent_no_of_words] => 27812 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17359940 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/359940
Semiconductor integrated circuit with semiconductor layer having indium, zinc, and oxygen Jun 27, 2021 Issued
Array ( [id] => 18623590 [patent_doc_number] => 11756644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Triage of multi-plane read requests [patent_app_type] => utility [patent_app_number] => 17/355720 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 14814 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17355720 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/355720
Triage of multi-plane read requests Jun 22, 2021 Issued
Array ( [id] => 18097074 [patent_doc_number] => 20220415415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => WINDOW PROGRAM VERIFY TO REDUCE DATA LATCH USAGE IN MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/355615 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17460 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17355615 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/355615
Window program verify to reduce data latch usage in memory device Jun 22, 2021 Issued
Array ( [id] => 18067984 [patent_doc_number] => 20220399072 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-15 [patent_title] => NONVOLATILE MEMORY WITH LATCH SCRAMBLE [patent_app_type] => utility [patent_app_number] => 17/347953 [patent_app_country] => US [patent_app_date] => 2021-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15104 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17347953 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/347953
NONVOLATILE MEMORY WITH LATCH SCRAMBLE Jun 14, 2021 Abandoned
Array ( [id] => 18804134 [patent_doc_number] => 11837297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Smart erase verify in non-volatile memory structures [patent_app_type] => utility [patent_app_number] => 17/344135 [patent_app_country] => US [patent_app_date] => 2021-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 13042 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17344135 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/344135
Smart erase verify in non-volatile memory structures Jun 9, 2021 Issued
Array ( [id] => 18481004 [patent_doc_number] => 11694755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-04 [patent_title] => Nonvolatile memory with data recovery [patent_app_type] => utility [patent_app_number] => 17/337329 [patent_app_country] => US [patent_app_date] => 2021-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 24 [patent_no_of_words] => 14275 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17337329 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/337329
Nonvolatile memory with data recovery Jun 1, 2021 Issued
Array ( [id] => 18721290 [patent_doc_number] => 11798642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Memory device with leakage current verifying circuit for minimizing leakage current [patent_app_type] => utility [patent_app_number] => 17/334827 [patent_app_country] => US [patent_app_date] => 2021-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5282 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17334827 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/334827
Memory device with leakage current verifying circuit for minimizing leakage current May 30, 2021 Issued
Array ( [id] => 17615112 [patent_doc_number] => 20220157392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => MEMORY CIRCUIT AND MEMORY PROGRAMMING METHOD [patent_app_type] => utility [patent_app_number] => 17/326294 [patent_app_country] => US [patent_app_date] => 2021-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2958 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17326294 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/326294
Memory circuit and memory programming method May 19, 2021 Issued
Array ( [id] => 18024027 [patent_doc_number] => 20220375526 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => ANALOG CONTENT-ADDRESS MEMORY AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/325244 [patent_app_country] => US [patent_app_date] => 2021-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5553 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17325244 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/325244
Analog content-address memory and operation method thereof May 19, 2021 Issued
Array ( [id] => 17566324 [patent_doc_number] => 20220130473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-28 [patent_title] => MEMORY DEVICE AND METHOD OF OPERATING THE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/245699 [patent_app_country] => US [patent_app_date] => 2021-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17245699 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/245699
Memory device and method of operating the memory device Apr 29, 2021 Issued
Array ( [id] => 18781985 [patent_doc_number] => 11823750 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => One-time programmable memory and method for verification and access [patent_app_type] => utility [patent_app_number] => 17/244450 [patent_app_country] => US [patent_app_date] => 2021-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 7066 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17244450 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/244450
One-time programmable memory and method for verification and access Apr 28, 2021 Issued
Array ( [id] => 17862637 [patent_doc_number] => 11443798 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-09-13 [patent_title] => High voltage switch with mitigated gate stress [patent_app_type] => utility [patent_app_number] => 17/244501 [patent_app_country] => US [patent_app_date] => 2021-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 18325 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17244501 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/244501
High voltage switch with mitigated gate stress Apr 28, 2021 Issued
Array ( [id] => 18131137 [patent_doc_number] => 11557352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Adjustable read retry order based on decoding success trend [patent_app_type] => utility [patent_app_number] => 17/244794 [patent_app_country] => US [patent_app_date] => 2021-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 12780 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17244794 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/244794
Adjustable read retry order based on decoding success trend Apr 28, 2021 Issued
Array ( [id] => 18047711 [patent_doc_number] => 11521669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Semiconductor device having cam that stores address signals [patent_app_type] => utility [patent_app_number] => 17/301533 [patent_app_country] => US [patent_app_date] => 2021-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5187 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17301533 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/301533
Semiconductor device having cam that stores address signals Apr 5, 2021 Issued
Array ( [id] => 18639265 [patent_doc_number] => 11763881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Computational memory cell and processing array device using the memory cells for XOR and XNOR computations [patent_app_type] => utility [patent_app_number] => 17/221565 [patent_app_country] => US [patent_app_date] => 2021-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 6329 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17221565 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/221565
Computational memory cell and processing array device using the memory cells for XOR and XNOR computations Apr 1, 2021 Issued
Array ( [id] => 16981199 [patent_doc_number] => 20210225436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-22 [patent_title] => COMPUTATIONAL MEMORY CELL AND PROCESSING ARRAY DEVICE USING THE MEMORY CELLS FOR XOR AND XNOR COMPUTATIONS [patent_app_type] => utility [patent_app_number] => 17/221558 [patent_app_country] => US [patent_app_date] => 2021-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6328 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17221558 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/221558
COMPUTATIONAL MEMORY CELL AND PROCESSING ARRAY DEVICE USING THE MEMORY CELLS FOR XOR AND XNOR COMPUTATIONS Apr 1, 2021 Abandoned
Array ( [id] => 17416823 [patent_doc_number] => 20220051727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => NON-VOLATILE MEMORY DEVICE, OPERATING METHOD THEREOF, CONTROLLER FOR CONTROLLING THE SAME, AND STORAGE DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/220218 [patent_app_country] => US [patent_app_date] => 2021-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11533 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17220218 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/220218
Non-volatile memory device, operating method thereof, controller for controlling the same, and storage device including the same Mar 31, 2021 Issued
Array ( [id] => 17862645 [patent_doc_number] => 11443806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-13 [patent_title] => Nonvolatile memory and method of operating nonvolatile memory [patent_app_type] => utility [patent_app_number] => 17/215614 [patent_app_country] => US [patent_app_date] => 2021-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 10676 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17215614 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/215614
Nonvolatile memory and method of operating nonvolatile memory Mar 28, 2021 Issued
Array ( [id] => 17893072 [patent_doc_number] => 11456051 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-09-27 [patent_title] => Optimized storage charge loss management [patent_app_type] => utility [patent_app_number] => 17/212531 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 8409 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17212531 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/212531
Optimized storage charge loss management Mar 24, 2021 Issued
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