Search

Alfredo Bermudez Lozada

Examiner (ID: 7463, Phone: (571)272-0877 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2825
Total Applications
617
Issued Applications
490
Pending Applications
86
Abandoned Applications
57

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17438772 [patent_doc_number] => 11264112 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-01 [patent_title] => Trim setting determination for a memory device [patent_app_type] => utility [patent_app_number] => 17/111755 [patent_app_country] => US [patent_app_date] => 2020-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5409 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17111755 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/111755
Trim setting determination for a memory device Dec 3, 2020 Issued
Array ( [id] => 16715342 [patent_doc_number] => 20210082489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-18 [patent_title] => TIME TRACKING CIRCUIT FOR FRAM [patent_app_type] => utility [patent_app_number] => 17/108041 [patent_app_country] => US [patent_app_date] => 2020-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8667 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17108041 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/108041
TIME TRACKING CIRCUIT FOR FRAM Nov 30, 2020 Abandoned
Array ( [id] => 17231994 [patent_doc_number] => 20210358551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => ANALOG NEURAL MEMORY ARRAY IN ARTIFICIAL NEURAL NETWORK COMPRISING LOGICAL CELLS AND IMPROVED PROGRAMMING MECHANISM [patent_app_type] => utility [patent_app_number] => 17/082956 [patent_app_country] => US [patent_app_date] => 2020-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17355 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -53 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17082956 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/082956
Analog neural memory array in artificial neural network comprising logical cells and improved programming mechanism Oct 27, 2020 Issued
Array ( [id] => 17878361 [patent_doc_number] => 11450382 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Memory cell state in a valley between adjacent data states [patent_app_type] => utility [patent_app_number] => 17/074156 [patent_app_country] => US [patent_app_date] => 2020-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7504 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17074156 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/074156
Memory cell state in a valley between adjacent data states Oct 18, 2020 Issued
Array ( [id] => 16585828 [patent_doc_number] => 20210020230 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-21 [patent_title] => MEMORY DEVICES AND METHODS OF CONTROLLING AN AUTO-REFRESH OPERATION OF THE MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/064111 [patent_app_country] => US [patent_app_date] => 2020-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3366 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17064111 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/064111
Memory devices and methods of controlling an auto-refresh operation of the memory devices Oct 5, 2020 Issued
Array ( [id] => 18415821 [patent_doc_number] => 11670366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Non-destructive mode cache programming in NAND flash memory devices [patent_app_type] => utility [patent_app_number] => 17/062867 [patent_app_country] => US [patent_app_date] => 2020-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8413 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17062867 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/062867
Non-destructive mode cache programming in NAND flash memory devices Oct 4, 2020 Issued
Array ( [id] => 17447820 [patent_doc_number] => 20220068325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => MEMORY CELL PROGRAMMING [patent_app_type] => utility [patent_app_number] => 17/034540 [patent_app_country] => US [patent_app_date] => 2020-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10555 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17034540 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/034540
Memory cell programming including applying programming pulses of different pulse widths to different access lines Sep 27, 2020 Issued
Array ( [id] => 16730912 [patent_doc_number] => 20210098060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => NON-VOLATILE MULTI-LEVEL CELL MEMORY USING A FERROELECTRIC SUPERLATTICE AND RELATED SYSTEMS [patent_app_type] => utility [patent_app_number] => 17/032847 [patent_app_country] => US [patent_app_date] => 2020-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17032847 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/032847
Non-volatile multi-level cell memory using a ferroelectric superlattice and related systems Sep 24, 2020 Issued
Array ( [id] => 16544656 [patent_doc_number] => 20200411071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => THREE-DIMENSIONAL (3-D) WRITE ASSIST SCHEME FOR MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 17/020450 [patent_app_country] => US [patent_app_date] => 2020-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13545 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17020450 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/020450
Three-dimensional (3-D) write assist scheme for memory cells Sep 13, 2020 Issued
Array ( [id] => 16723495 [patent_doc_number] => 20210090642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/017738 [patent_app_country] => US [patent_app_date] => 2020-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14105 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17017738 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/017738
Semiconductor memory device executing program operation Sep 10, 2020 Issued
Array ( [id] => 17573938 [patent_doc_number] => 11322212 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Semiconductor memory device and erase verify operation [patent_app_type] => utility [patent_app_number] => 17/014695 [patent_app_country] => US [patent_app_date] => 2020-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 30 [patent_no_of_words] => 18274 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17014695 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/014695
Semiconductor memory device and erase verify operation Sep 7, 2020 Issued
Array ( [id] => 18431439 [patent_doc_number] => 11676666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Read disturb scan for unprogrammed wordlines [patent_app_type] => utility [patent_app_number] => 17/013419 [patent_app_country] => US [patent_app_date] => 2020-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9694 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17013419 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/013419
Read disturb scan for unprogrammed wordlines Sep 3, 2020 Issued
Array ( [id] => 18431445 [patent_doc_number] => 11676672 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Semiconductor storage device configured to perform a detection operation after performing a program loop [patent_app_type] => utility [patent_app_number] => 17/011747 [patent_app_country] => US [patent_app_date] => 2020-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 22 [patent_no_of_words] => 13742 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17011747 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/011747
Semiconductor storage device configured to perform a detection operation after performing a program loop Sep 2, 2020 Issued
Array ( [id] => 17449324 [patent_doc_number] => 20220069829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => OPTICAL COMB SOURCE FOR CONTENT-ADDRESSABLE MEMORY ENCODERS [patent_app_type] => utility [patent_app_number] => 17/006490 [patent_app_country] => US [patent_app_date] => 2020-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8052 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17006490 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/006490
Optical comb source for content-addressable memory encoders Aug 27, 2020 Issued
Array ( [id] => 18016140 [patent_doc_number] => 11508443 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Nonvolatile memory device including a peripheral circuit to verify a program operation [patent_app_type] => utility [patent_app_number] => 17/004074 [patent_app_country] => US [patent_app_date] => 2020-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11146 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17004074 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/004074
Nonvolatile memory device including a peripheral circuit to verify a program operation Aug 26, 2020 Issued
Array ( [id] => 17025222 [patent_doc_number] => 20210249094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => STORAGE DEVICE AND OPERATING METHOD OF STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 16/996266 [patent_app_country] => US [patent_app_date] => 2020-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11021 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16996266 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/996266
Storage device that determines write area of read reclaim operation based on estimated read count of reclaim area and operating method of the storage device Aug 17, 2020 Issued
Array ( [id] => 16560113 [patent_doc_number] => 20210005262 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-07 [patent_title] => MEMORY BLOCK SELECT CIRCUITRY INCLUDING VOLTAGE BOOTSTRAPPING CONTROL [patent_app_type] => utility [patent_app_number] => 16/995361 [patent_app_country] => US [patent_app_date] => 2020-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12852 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16995361 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/995361
Memory block select circuitry including voltage bootstrapping control Aug 16, 2020 Issued
Array ( [id] => 18016136 [patent_doc_number] => 11508439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Memory device having a control logic to control program operations and method of operating the same [patent_app_type] => utility [patent_app_number] => 16/989169 [patent_app_country] => US [patent_app_date] => 2020-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 22868 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16989169 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/989169
Memory device having a control logic to control program operations and method of operating the same Aug 9, 2020 Issued
Array ( [id] => 18464180 [patent_doc_number] => 11688473 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => SLC page read [patent_app_type] => utility [patent_app_number] => 16/986827 [patent_app_country] => US [patent_app_date] => 2020-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 14032 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16986827 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/986827
SLC page read Aug 5, 2020 Issued
Array ( [id] => 16544669 [patent_doc_number] => 20200411084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => Static Random Access Memory with Write Assist Circuit [patent_app_type] => utility [patent_app_number] => 16/983749 [patent_app_country] => US [patent_app_date] => 2020-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9422 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16983749 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/983749
Static random access memory with write assist circuit Aug 2, 2020 Issued
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