Search

Alfredo Bermudez Lozada

Examiner (ID: 7463, Phone: (571)272-0877 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2825
Total Applications
617
Issued Applications
490
Pending Applications
86
Abandoned Applications
57

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13485727 [patent_doc_number] => 20180294406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-11 [patent_title] => NONVOLATILE MEMORY AND ITS OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 15/950193 [patent_app_country] => US [patent_app_date] => 2018-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8218 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15950193 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/950193
Nonvolatile memory comprising variable resistance transistors and method for operating the same Apr 10, 2018 Issued
Array ( [id] => 15547197 [patent_doc_number] => 10573388 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-25 [patent_title] => Non-volatile storage system with adjustable select gates as a function of temperature [patent_app_type] => utility [patent_app_number] => 15/944917 [patent_app_country] => US [patent_app_date] => 2018-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 36 [patent_no_of_words] => 16299 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15944917 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/944917
Non-volatile storage system with adjustable select gates as a function of temperature Apr 3, 2018 Issued
Array ( [id] => 17456131 [patent_doc_number] => 11270998 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-08 [patent_title] => Embedded memory in three-dimensional integrated circuit [patent_app_type] => utility [patent_app_number] => 15/943537 [patent_app_country] => US [patent_app_date] => 2018-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8858 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15943537 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/943537
Embedded memory in three-dimensional integrated circuit Apr 1, 2018 Issued
Array ( [id] => 14937823 [patent_doc_number] => 20190304550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => BOUNDARY WORD LINE VOLTAGE SHIFT [patent_app_type] => utility [patent_app_number] => 15/941747 [patent_app_country] => US [patent_app_date] => 2018-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12067 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15941747 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/941747
Boundary word line voltage shift Mar 29, 2018 Issued
Array ( [id] => 14937835 [patent_doc_number] => 20190304556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-03 [patent_title] => METHOD FOR PROGRAMMING NON-VOLATILE MEMORY AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 15/939359 [patent_app_country] => US [patent_app_date] => 2018-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3757 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15939359 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/939359
METHOD FOR PROGRAMMING NON-VOLATILE MEMORY AND MEMORY SYSTEM Mar 28, 2018 Abandoned
Array ( [id] => 13935681 [patent_doc_number] => 20190051356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => DECODER AND SEMICONDUCTOR DEVICE HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 15/934557 [patent_app_country] => US [patent_app_date] => 2018-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12204 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15934557 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/934557
Global wordline decoder and semiconductor device having the same Mar 22, 2018 Issued
Array ( [id] => 14903775 [patent_doc_number] => 20190295653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => MEMORY BLOCK SELECT CIRCUITRY INCLUDING VOLTAGE BOOTSTRAPPING CONTROL [patent_app_type] => utility [patent_app_number] => 15/933087 [patent_app_country] => US [patent_app_date] => 2018-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12825 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15933087 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/933087
Memory block select circuitry including voltage bootstrapping control Mar 21, 2018 Issued
Array ( [id] => 15732859 [patent_doc_number] => 10614862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => Assemblies comprising memory cells and select gates [patent_app_type] => utility [patent_app_number] => 15/926427 [patent_app_country] => US [patent_app_date] => 2018-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6803 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15926427 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/926427
Assemblies comprising memory cells and select gates Mar 19, 2018 Issued
Array ( [id] => 15889103 [patent_doc_number] => 10650900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-12 [patent_title] => Stacked type semiconductor memory device and method for reading the same [patent_app_type] => utility [patent_app_number] => 15/923501 [patent_app_country] => US [patent_app_date] => 2018-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4787 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 335 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15923501 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/923501
Stacked type semiconductor memory device and method for reading the same Mar 15, 2018 Issued
Array ( [id] => 13405085 [patent_doc_number] => 20180254085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-06 [patent_title] => QUANTUM MEMORY SYSTEMS AND QUANTUM REPEATER SYSTEMS COMPRISING DOPED POLYCRYSTALLINE CERAMIC OPTICAL DEVICES AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/906631 [patent_app_country] => US [patent_app_date] => 2018-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16119 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15906631 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/906631
Quantum memory systems and quantum repeater systems comprising doped polycrystalline ceramic optical devices and methods of manufacturing the same Feb 26, 2018 Issued
Array ( [id] => 16896073 [patent_doc_number] => 11037634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Semiconductor storage device having a group adjacent bit lines connected to sense circuits that are each connected to a different data bus [patent_app_type] => utility [patent_app_number] => 15/901881 [patent_app_country] => US [patent_app_date] => 2018-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 14510 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 378 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15901881 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/901881
Semiconductor storage device having a group adjacent bit lines connected to sense circuits that are each connected to a different data bus Feb 20, 2018 Issued
Array ( [id] => 13578591 [patent_doc_number] => 20180340844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-29 [patent_title] => TEMPERATURE SENSING APPLICATION FOR MOBILE DEVICE [patent_app_type] => utility [patent_app_number] => 15/894483 [patent_app_country] => US [patent_app_date] => 2018-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12214 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15894483 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/894483
TEMPERATURE SENSING APPLICATION FOR MOBILE DEVICE Feb 11, 2018 Abandoned
Array ( [id] => 14557761 [patent_doc_number] => 10347348 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Semiconductor memory device and data setting method [patent_app_type] => utility [patent_app_number] => 15/888865 [patent_app_country] => US [patent_app_date] => 2018-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3616 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15888865 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/888865
Semiconductor memory device and data setting method Feb 4, 2018 Issued
Array ( [id] => 15375419 [patent_doc_number] => 10529436 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-01-07 [patent_title] => One-time programmable bitcell with diode under anti-fuse [patent_app_type] => utility [patent_app_number] => 15/872673 [patent_app_country] => US [patent_app_date] => 2018-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7170 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15872673 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/872673
One-time programmable bitcell with diode under anti-fuse Jan 15, 2018 Issued
Array ( [id] => 12716071 [patent_doc_number] => 20180130523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-10 [patent_title] => DATA OUTPUT CIRCUIT AND SEMICONDUCTOR MEMORY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 15/861015 [patent_app_country] => US [patent_app_date] => 2018-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8475 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15861015 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/861015
Data output circuit and semiconductor memory device including the same Jan 2, 2018 Issued
Array ( [id] => 15474769 [patent_doc_number] => 10553267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Semiconductor device for initializing memory cells [patent_app_type] => utility [patent_app_number] => 15/852541 [patent_app_country] => US [patent_app_date] => 2017-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8129 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15852541 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/852541
Semiconductor device for initializing memory cells Dec 21, 2017 Issued
Array ( [id] => 15375369 [patent_doc_number] => 10529410 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-07 [patent_title] => Techniques for accessing an array of memory cells to reduce parasitic coupling [patent_app_type] => utility [patent_app_number] => 15/845619 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 20721 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15845619 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/845619
Techniques for accessing an array of memory cells to reduce parasitic coupling Dec 17, 2017 Issued
Array ( [id] => 15414337 [patent_doc_number] => 20200027491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => MEMORY CELL, METHODS OF FORMING AND OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/470969 [patent_app_country] => US [patent_app_date] => 2017-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13237 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16470969 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/470969
MEMORY CELL, METHODS OF FORMING AND OPERATING THE SAME Dec 17, 2017 Abandoned
Array ( [id] => 14284669 [patent_doc_number] => 20190139619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => TRIM SETTING DETERMINATION FOR A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 15/802597 [patent_app_country] => US [patent_app_date] => 2017-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15802597 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/802597
Trim setting determination for a memory device Nov 2, 2017 Issued
Array ( [id] => 16218246 [patent_doc_number] => 10734066 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Static random access memory with write assist circuit [patent_app_type] => utility [patent_app_number] => 15/800443 [patent_app_country] => US [patent_app_date] => 2017-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9631 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15800443 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/800443
Static random access memory with write assist circuit Oct 31, 2017 Issued
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