Search

Alfredo Bermudez Lozada

Examiner (ID: 7463, Phone: (571)272-0877 , Office: P/2825 )

Most Active Art Unit
2825
Art Unit(s)
2825
Total Applications
617
Issued Applications
490
Pending Applications
86
Abandoned Applications
57

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18865625 [patent_doc_number] => 20230420062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => MEMORY DEVICE, MEMORY SYSTEM, AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/357883 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15675 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357883 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/357883
MEMORY DEVICE, MEMORY SYSTEM, AND OPERATING METHOD THEREOF Jul 23, 2023 Pending
Array ( [id] => 19221239 [patent_doc_number] => 20240185943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => BINARY SEARCH BIT ERROR RATE ESTIMATION SCAN FOR NON-VOLATILE MEMORY APPARATUS [patent_app_type] => utility [patent_app_number] => 18/219387 [patent_app_country] => US [patent_app_date] => 2023-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29338 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18219387 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/219387
BINARY SEARCH BIT ERROR RATE ESTIMATION SCAN FOR NON-VOLATILE MEMORY APPARATUS Jul 6, 2023 Pending
Array ( [id] => 20482651 [patent_doc_number] => 12531127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Compact CAM array for decision tree inference (tree-CAM) [patent_app_type] => utility [patent_app_number] => 18/347318 [patent_app_country] => US [patent_app_date] => 2023-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7535 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18347318 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/347318
Compact CAM array for decision tree inference (tree-CAM) Jul 4, 2023 Issued
Array ( [id] => 20118217 [patent_doc_number] => 12367932 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Memory device in which latch is coupled to source line and method of operation [patent_app_type] => utility [patent_app_number] => 18/218415 [patent_app_country] => US [patent_app_date] => 2023-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 3514 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18218415 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/218415
Memory device in which latch is coupled to source line and method of operation Jul 4, 2023 Issued
Array ( [id] => 19687689 [patent_doc_number] => 20250006234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => LEAKAGE COMPENSATED DYNAMIC LATCH [patent_app_type] => utility [patent_app_number] => 18/216424 [patent_app_country] => US [patent_app_date] => 2023-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12179 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18216424 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/216424
LEAKAGE COMPENSATED DYNAMIC LATCH Jun 28, 2023 Pending
Array ( [id] => 19363941 [patent_doc_number] => 20240265975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => NAND FLASH MEMORY DEVICE WITH ENHANCED DATA RETENTION CHARACTERISTICS AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/340473 [patent_app_country] => US [patent_app_date] => 2023-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8326 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18340473 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/340473
NAND flash memory device with enhanced data retention characteristics and operating method thereof Jun 22, 2023 Issued
Array ( [id] => 19384320 [patent_doc_number] => 20240274190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => MEMORY CIRCUIT AND METHOD OF OPERATING SAME [patent_app_type] => utility [patent_app_number] => 18/337267 [patent_app_country] => US [patent_app_date] => 2023-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16812 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18337267 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/337267
MEMORY CIRCUIT AND METHOD OF OPERATING SAME Jun 18, 2023 Pending
Array ( [id] => 20375080 [patent_doc_number] => 12482522 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-25 [patent_title] => Memory device and operating method of the memory device for reducing power consumption for program operation [patent_app_type] => utility [patent_app_number] => 18/337275 [patent_app_country] => US [patent_app_date] => 2023-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4996 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18337275 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/337275
Memory device and operating method of the memory device for reducing power consumption for program operation Jun 18, 2023 Issued
Array ( [id] => 20538562 [patent_doc_number] => 12555641 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-02-17 [patent_title] => Memory device for performing a program operation based on operation stage and operating method thereof [patent_app_type] => utility [patent_app_number] => 18/333366 [patent_app_country] => US [patent_app_date] => 2023-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3711 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18333366 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/333366
Memory device for performing a program operation based on operation stage and operating method thereof Jun 11, 2023 Issued
Array ( [id] => 19010256 [patent_doc_number] => 20240074327 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => MAGNETIC MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/332759 [patent_app_country] => US [patent_app_date] => 2023-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9598 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18332759 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/332759
Magnetic memory device and method for manufacturing the same Jun 11, 2023 Issued
Array ( [id] => 18661049 [patent_doc_number] => 20230307062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => NON-VOLATILE MEMORY DEVICE, OPERATING METHOD THEREOF, CONTROLLER FOR CONTROLLING THE SAME, AND STORAGE DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/326606 [patent_app_country] => US [patent_app_date] => 2023-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11550 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18326606 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/326606
NON-VOLATILE MEMORY DEVICE, OPERATING METHOD THEREOF, CONTROLLER FOR CONTROLLING THE SAME, AND STORAGE DEVICE INCLUDING THE SAME May 30, 2023 Abandoned
Array ( [id] => 19604413 [patent_doc_number] => 20240395293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => CONTENTION-FREE DUAL-VOLTAGE LOGIC CELL [patent_app_type] => utility [patent_app_number] => 18/323997 [patent_app_country] => US [patent_app_date] => 2023-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14653 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18323997 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/323997
Contention-free dual-voltage logic cell May 24, 2023 Issued
Array ( [id] => 19596798 [patent_doc_number] => 12154651 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Memory device, method of operating the memory device, memory module, and method of operating the memory module [patent_app_type] => utility [patent_app_number] => 18/201880 [patent_app_country] => US [patent_app_date] => 2023-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 32 [patent_no_of_words] => 11402 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18201880 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/201880
Memory device, method of operating the memory device, memory module, and method of operating the memory module May 24, 2023 Issued
Array ( [id] => 20495160 [patent_doc_number] => 12537036 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-27 [patent_title] => Storage device, non-volatile memory device, and method of operating the non- volatile memory device to monitor repeated data patterns [patent_app_type] => utility [patent_app_number] => 18/322725 [patent_app_country] => US [patent_app_date] => 2023-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3350 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18322725 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/322725
Storage device, non-volatile memory device, and method of operating the non- volatile memory device to monitor repeated data patterns May 23, 2023 Issued
Array ( [id] => 19605670 [patent_doc_number] => 20240396550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => DRIVER CIRCUITRY WITH REDUCED INTERSYMBOL INTERFERENCE JITTER [patent_app_type] => utility [patent_app_number] => 18/200432 [patent_app_country] => US [patent_app_date] => 2023-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5742 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18200432 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/200432
Driver circuitry with reduced intersymbol interference jitter May 21, 2023 Issued
Array ( [id] => 18585740 [patent_doc_number] => 20230268004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => SETTING LEVELS FOR A PROGRAMMING OPERATION IN A NEURAL NETWORK ARRAY [patent_app_type] => utility [patent_app_number] => 18/140103 [patent_app_country] => US [patent_app_date] => 2023-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17188 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18140103 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/140103
Setting levels for a programming operation in a neural network array Apr 26, 2023 Issued
Array ( [id] => 19356715 [patent_doc_number] => 12057170 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Neural network array comprising one or more coarse cells and one or more fine cells [patent_app_type] => utility [patent_app_number] => 18/139908 [patent_app_country] => US [patent_app_date] => 2023-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 50 [patent_figures_cnt] => 57 [patent_no_of_words] => 17276 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18139908 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/139908
Neural network array comprising one or more coarse cells and one or more fine cells Apr 25, 2023 Issued
Array ( [id] => 19261457 [patent_doc_number] => 12021530 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => Semiconductor integrated circuit [patent_app_type] => utility [patent_app_number] => 18/136924 [patent_app_country] => US [patent_app_date] => 2023-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 94 [patent_no_of_words] => 27799 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18136924 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/136924
Semiconductor integrated circuit Apr 19, 2023 Issued
Array ( [id] => 20441341 [patent_doc_number] => 12512181 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-30 [patent_title] => Memory device performing target refresh operation and operating method thereof [patent_app_type] => utility [patent_app_number] => 18/295851 [patent_app_country] => US [patent_app_date] => 2023-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6864 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18295851 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/295851
Memory device performing target refresh operation and operating method thereof Apr 4, 2023 Issued
Array ( [id] => 19175865 [patent_doc_number] => 20240161839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => MEMORY DEVICE FOR PERFORMING PROGRAM OPERATION AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/193474 [patent_app_country] => US [patent_app_date] => 2023-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5443 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18193474 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/193474
MEMORY DEVICE FOR PERFORMING PROGRAM OPERATION AND METHOD OF OPERATING THE SAME Mar 29, 2023 Pending
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