Search

Ali Naraghi

Examiner (ID: 10218, Phone: (571)270-5720 , Office: P/2896 )

Most Active Art Unit
2896
Art Unit(s)
2817, 2891, 2895, 2896
Total Applications
1024
Issued Applications
853
Pending Applications
81
Abandoned Applications
117

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11495529 [patent_doc_number] => 20170069714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-09 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/252116 [patent_app_country] => US [patent_app_date] => 2016-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 10317 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15252116 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/252116
Semiconductor device and method of manufacturing the same Aug 29, 2016 Issued
Array ( [id] => 12315039 [patent_doc_number] => 09941399 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-10 [patent_title] => Enhancement mode III-N HEMTs [patent_app_type] => utility [patent_app_number] => 15/242266 [patent_app_country] => US [patent_app_date] => 2016-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 33 [patent_no_of_words] => 8632 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15242266 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/242266
Enhancement mode III-N HEMTs Aug 18, 2016 Issued
Array ( [id] => 11328249 [patent_doc_number] => 20160358861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-08 [patent_title] => 'REGISTRATION MARK FORMATION DURING SIDEWALL IMAGE TRANSFER PROCESS' [patent_app_type] => utility [patent_app_number] => 15/239166 [patent_app_country] => US [patent_app_date] => 2016-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5787 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15239166 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/239166
Registration mark formation during sidewall image transfer process Aug 16, 2016 Issued
Array ( [id] => 11740124 [patent_doc_number] => 09704716 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-11 [patent_title] => 'Deposition of smooth metal nitride films' [patent_app_type] => utility [patent_app_number] => 15/231611 [patent_app_country] => US [patent_app_date] => 2016-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 11740 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15231611 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/231611
Deposition of smooth metal nitride films Aug 7, 2016 Issued
Array ( [id] => 11694551 [patent_doc_number] => 20170170269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-15 [patent_title] => 'STACKED NANOSHEETS BY ASPECT RATIO TRAPPING' [patent_app_type] => utility [patent_app_number] => 15/228153 [patent_app_country] => US [patent_app_date] => 2016-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7558 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15228153 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/228153
Stacked nanosheets by aspect ratio trapping Aug 3, 2016 Issued
Array ( [id] => 13019539 [patent_doc_number] => 10032889 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-24 [patent_title] => Self-aligned passivation of active regions [patent_app_type] => utility [patent_app_number] => 15/228147 [patent_app_country] => US [patent_app_date] => 2016-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 4078 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15228147 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/228147
Self-aligned passivation of active regions Aug 3, 2016 Issued
Array ( [id] => 11273669 [patent_doc_number] => 20160336216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'AIR-GAP SCHEME FOR BEOL PROCESS' [patent_app_type] => utility [patent_app_number] => 15/223483 [patent_app_country] => US [patent_app_date] => 2016-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4788 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15223483 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/223483
Air-gap scheme for BEOL process Jul 28, 2016 Issued
Array ( [id] => 13019591 [patent_doc_number] => 10032915 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-24 [patent_title] => Non-planar transistors and methods of fabrication thereof [patent_app_type] => utility [patent_app_number] => 15/206794 [patent_app_country] => US [patent_app_date] => 2016-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 3666 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15206794 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/206794
Non-planar transistors and methods of fabrication thereof Jul 10, 2016 Issued
Array ( [id] => 14588103 [patent_doc_number] => 20190221660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-18 [patent_title] => GATE STACK DESIGN FOR GAN E-MODE TRANSISTOR PERFORMANCE [patent_app_type] => utility [patent_app_number] => 16/306292 [patent_app_country] => US [patent_app_date] => 2016-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9898 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16306292 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/306292
Gate stack design for GaN e-mode transistor performance Jun 30, 2016 Issued
Array ( [id] => 16959253 [patent_doc_number] => 11063137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-13 [patent_title] => Asymmetric spacer for low capacitance applications [patent_app_type] => utility [patent_app_number] => 16/302698 [patent_app_country] => US [patent_app_date] => 2016-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 5064 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16302698 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/302698
Asymmetric spacer for low capacitance applications Jun 27, 2016 Issued
Array ( [id] => 11111092 [patent_doc_number] => 20160308062 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => 'LOGIC FINFET HIGH-K/CONDUCTIVE GATE EMBEDDED MULTIPLE TIME PROGRAMMABLE FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 15/194125 [patent_app_country] => US [patent_app_date] => 2016-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5838 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15194125 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/194125
LOGIC FINFET HIGH-K/CONDUCTIVE GATE EMBEDDED MULTIPLE TIME PROGRAMMABLE FLASH MEMORY Jun 26, 2016 Abandoned
Array ( [id] => 16739012 [patent_doc_number] => 10964678 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-30 [patent_title] => LED screen or illumination means with a flexible film structure [patent_app_type] => utility [patent_app_number] => 16/310829 [patent_app_country] => US [patent_app_date] => 2016-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 13432 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16310829 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/310829
LED screen or illumination means with a flexible film structure Jun 20, 2016 Issued
Array ( [id] => 16789363 [patent_doc_number] => 10991802 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-27 [patent_title] => Quantum dot devices with gate interface materials [patent_app_type] => utility [patent_app_number] => 16/306475 [patent_app_country] => US [patent_app_date] => 2016-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 62 [patent_no_of_words] => 17014 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16306475 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/306475
Quantum dot devices with gate interface materials Jun 9, 2016 Issued
Array ( [id] => 11517749 [patent_doc_number] => 20170084822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-23 [patent_title] => 'MAGNETIC MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 15/169775 [patent_app_country] => US [patent_app_date] => 2016-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 14572 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15169775 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/169775
Magnetic memory devices May 31, 2016 Issued
Array ( [id] => 12195838 [patent_doc_number] => 09899577 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-20 [patent_title] => 'Light-emitting apparatus including photoluminescent layer' [patent_app_type] => utility [patent_app_number] => 15/169771 [patent_app_country] => US [patent_app_date] => 2016-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 62 [patent_no_of_words] => 15776 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15169771 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/169771
Light-emitting apparatus including photoluminescent layer May 31, 2016 Issued
Array ( [id] => 12195764 [patent_doc_number] => 09899502 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-20 [patent_title] => 'Bipolar junction transistor layout structure' [patent_app_type] => utility [patent_app_number] => 15/169695 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4628 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15169695 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/169695
Bipolar junction transistor layout structure May 30, 2016 Issued
Array ( [id] => 12990325 [patent_doc_number] => 20170345851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => GRADED-SEMICONDUCTOR IMAGE SENSOR [patent_app_type] => utility [patent_app_number] => 15/169477 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15169477 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/169477
Graded-semiconductor image sensor May 30, 2016 Issued
Array ( [id] => 11932742 [patent_doc_number] => 09799745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-24 [patent_title] => 'Atomic layer deposition methods and structures thereof' [patent_app_type] => utility [patent_app_number] => 15/169566 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 8946 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15169566 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/169566
Atomic layer deposition methods and structures thereof May 30, 2016 Issued
Array ( [id] => 12195798 [patent_doc_number] => 09899537 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-02-20 [patent_title] => 'Semiconductor device with transition metal dichalocogenide hetero-structure' [patent_app_type] => utility [patent_app_number] => 15/169451 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 5905 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15169451 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/169451
Semiconductor device with transition metal dichalocogenide hetero-structure May 30, 2016 Issued
Array ( [id] => 12935905 [patent_doc_number] => 09831193 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-11-28 [patent_title] => Methods and apparatus for scribe street probe pads with reduced die chipping during wafer dicing [patent_app_type] => utility [patent_app_number] => 15/169700 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 11168 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15169700 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/169700
Methods and apparatus for scribe street probe pads with reduced die chipping during wafer dicing May 30, 2016 Issued
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