Search

Alice W. Tang

Examiner (ID: 10455)

Most Active Art Unit
2503
Art Unit(s)
2503, 2815, 2814
Total Applications
309
Issued Applications
141
Pending Applications
60
Abandoned Applications
111

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19116483 [patent_doc_number] => 20240128233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => SENSOR PACKAGE STRUCTURE AND MANUFACTURING METHOD THREROF [patent_app_type] => utility [patent_app_number] => 18/206132 [patent_app_country] => US [patent_app_date] => 2023-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5172 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18206132 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/206132
Sensor chips having columnar microstructures embedded and surrounded by adhesive layer in a package structure and manufacturing method thereof Jun 5, 2023 Issued
Array ( [id] => 18653288 [patent_doc_number] => 20230299128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => LATERAL FIELD-EFFECT TRANSISTOR AND PREPARING METHOD [patent_app_type] => utility [patent_app_number] => 18/201771 [patent_app_country] => US [patent_app_date] => 2023-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6322 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18201771 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/201771
LATERAL FIELD-EFFECT TRANSISTOR AND PREPARING METHOD May 24, 2023 Pending
Array ( [id] => 19161118 [patent_doc_number] => 20240153825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => SEMICONDUCTOR DEVICE HAVING AN NMOS TRANSISTOR AND A PMOS TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/323416 [patent_app_country] => US [patent_app_date] => 2023-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8416 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18323416 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/323416
Semiconductor device having NMOS transistors and channels of PMOS transistors formed of silicon/silicon germanium/silicon wherein silicon germanium not in contact with silicon oxide May 24, 2023 Issued
Array ( [id] => 18821417 [patent_doc_number] => 20230395758 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/201209 [patent_app_country] => US [patent_app_date] => 2023-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7057 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18201209 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/201209
DISPLAY DEVICE May 23, 2023 Pending
Array ( [id] => 19589869 [patent_doc_number] => 20240387426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => ELECTROMIGRATION RESISTANT SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/319522 [patent_app_country] => US [patent_app_date] => 2023-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4384 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18319522 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/319522
ELECTROMIGRATION RESISTANT SEMICONDUCTOR STRUCTURE May 17, 2023 Pending
Array ( [id] => 19071254 [patent_doc_number] => 20240105680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => SEMICONDUCTOR CHIP STACK STRUCTURE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/198418 [patent_app_country] => US [patent_app_date] => 2023-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18198418 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/198418
SEMICONDUCTOR CHIP STACK STRUCTURE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME May 16, 2023 Pending
Array ( [id] => 18774579 [patent_doc_number] => 20230369410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => TRANSISTOR DEVICE, SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING A TRANSISTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/142050 [patent_app_country] => US [patent_app_date] => 2023-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11889 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142050 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/142050
TRANSISTOR DEVICE, SEMICONDUCTOR PACKAGE AND METHOD OF FABRICATING A TRANSISTOR DEVICE May 1, 2023 Pending
Array ( [id] => 19560011 [patent_doc_number] => 20240371803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => METHOD FOR FORMING A REDISTRIBUTION LAYER STRUCTURE, AND CHIP PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/310144 [patent_app_country] => US [patent_app_date] => 2023-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7346 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18310144 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/310144
METHOD FOR FORMING A REDISTRIBUTION LAYER STRUCTURE, AND CHIP PACKAGE STRUCTURE Apr 30, 2023 Pending
Array ( [id] => 18991175 [patent_doc_number] => 20240063144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/309179 [patent_app_country] => US [patent_app_date] => 2023-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5711 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18309179 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/309179
SEMICONDUCTOR PACKAGE Apr 27, 2023 Pending
Array ( [id] => 19171386 [patent_doc_number] => 20240157360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => MICROFLUIDIC SUBSTRATE, MICROFLUIDIC DEVICE AND DRIVING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/124254 [patent_app_country] => US [patent_app_date] => 2023-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16220 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18124254 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/124254
MICROFLUIDIC SUBSTRATE, MICROFLUIDIC DEVICE AND DRIVING METHOD THEREOF Mar 20, 2023 Pending
Array ( [id] => 20748284 [patent_doc_number] => 12648224 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-02 [patent_title] => Display device having bank directly on and partially in opening of insulating layer and bank surrounding light emitting elements for outgassing [patent_app_type] => utility [patent_app_number] => 18/096705 [patent_app_country] => US [patent_app_date] => 2023-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 12726 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18096705 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/096705
Display device having bank directly on and partially in opening of insulating layer and bank surrounding light emitting elements for outgassing Jan 12, 2023 Issued
Array ( [id] => 19223602 [patent_doc_number] => 20240188306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => RESISTIVE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/096532 [patent_app_country] => US [patent_app_date] => 2023-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18096532 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/096532
RESISTIVE MEMORY DEVICE Jan 11, 2023 Pending
Array ( [id] => 18500526 [patent_doc_number] => 20230223320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-13 [patent_title] => SEMICONDUCTOR DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/153688 [patent_app_country] => US [patent_app_date] => 2023-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6048 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18153688 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/153688
SEMICONDUCTOR DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME Jan 11, 2023 Pending
Array ( [id] => 18898818 [patent_doc_number] => 20240014303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING TRENCH STRUCTURE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/153633 [patent_app_country] => US [patent_app_date] => 2023-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11029 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18153633 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/153633
Semiconductor device having gate insulating layer in trench and on upper surface of substrate, channel layer on gate insulating layer, and spaced-apart source and drain electrodes on channel layer Jan 11, 2023 Issued
Array ( [id] => 19071425 [patent_doc_number] => 20240105851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/153911 [patent_app_country] => US [patent_app_date] => 2023-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8045 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18153911 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/153911
SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME Jan 11, 2023 Pending
Array ( [id] => 18633594 [patent_doc_number] => 20230292521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/153763 [patent_app_country] => US [patent_app_date] => 2023-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18153763 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/153763
Memory device having hydrogen-ion bypass via on cell substrate and connected to pad structure Jan 11, 2023 Issued
Array ( [id] => 18600387 [patent_doc_number] => 20230275189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/096166 [patent_app_country] => US [patent_app_date] => 2023-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19556 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18096166 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/096166
DISPLAY DEVICE Jan 11, 2023 Pending
Array ( [id] => 19038227 [patent_doc_number] => 20240088042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => SEMICONDUCTOR STRUCTURES AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/152778 [patent_app_country] => US [patent_app_date] => 2023-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10606 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18152778 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/152778
SEMICONDUCTOR STRUCTURES AND MANUFACTURING METHOD THEREOF Jan 10, 2023 Pending
Array ( [id] => 20792667 [patent_doc_number] => 12666599 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-23 [patent_title] => Method to insulate contact plug with silicon carbon oxide and to insulate above bit line with silicon oxide by oxidating silicon carbon oxide [patent_app_type] => utility [patent_app_number] => 18/152880 [patent_app_country] => US [patent_app_date] => 2023-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 2281 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18152880 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/152880
Method to insulate contact plug with silicon carbon oxide and to insulate above bit line with silicon oxide by oxidating silicon carbon oxide Jan 10, 2023 Issued
Array ( [id] => 18379742 [patent_doc_number] => 20230154831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/153013 [patent_app_country] => US [patent_app_date] => 2023-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8444 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18153013 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/153013
SEMICONDUCTOR STRUCTURE AND FORMING METHOD THEREOF Jan 10, 2023 Abandoned
Menu