| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3626026
[patent_doc_number] => 05535340
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-09
[patent_title] => 'Method and apparatus for maintaining transaction ordering and supporting deferred replies in a bus bridge'
[patent_app_type] => 1
[patent_app_number] => 8/247026
[patent_app_country] => US
[patent_app_date] => 1994-05-20
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[pdf_file] => patents/05/535/05535340.pdf
[firstpage_image] =>[orig_patent_app_number] => 247026
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/247026 | Method and apparatus for maintaining transaction ordering and supporting deferred replies in a bus bridge | May 19, 1994 | Issued |
Array
(
[id] => 3561049
[patent_doc_number] => 05546546
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-13
[patent_title] => 'Method and apparatus for maintaining transaction ordering and arbitrating in a bus bridge'
[patent_app_type] => 1
[patent_app_number] => 8/246776
[patent_app_country] => US
[patent_app_date] => 1994-05-20
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/546/05546546.pdf
[firstpage_image] =>[orig_patent_app_number] => 246776
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/246776 | Method and apparatus for maintaining transaction ordering and arbitrating in a bus bridge | May 19, 1994 | Issued |
Array
(
[id] => 3612883
[patent_doc_number] => 05560021
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-24
[patent_title] => 'Power management and packet delivery method for use in a wireless local area network (LAN)'
[patent_app_type] => 1
[patent_app_number] => 8/223497
[patent_app_country] => US
[patent_app_date] => 1994-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_words_short_claim] => 186
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/560/05560021.pdf
[firstpage_image] =>[orig_patent_app_number] => 223497
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/223497 | Power management and packet delivery method for use in a wireless local area network (LAN) | Apr 3, 1994 | Issued |
Array
(
[id] => 3709522
[patent_doc_number] => 05619734
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-08
[patent_title] => 'Programmable controller and method of operation thereof'
[patent_app_type] => 1
[patent_app_number] => 8/221759
[patent_app_country] => US
[patent_app_date] => 1994-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
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[patent_no_of_words] => 8621
[patent_no_of_claims] => 30
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[pdf_file] => patents/05/619/05619734.pdf
[firstpage_image] =>[orig_patent_app_number] => 221759
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/221759 | Programmable controller and method of operation thereof | Mar 31, 1994 | Issued |
Array
(
[id] => 3511232
[patent_doc_number] => 05533205
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-02
[patent_title] => 'Method and system for efficient bus allocation in a multimedia computer system'
[patent_app_type] => 1
[patent_app_number] => 8/220326
[patent_app_country] => US
[patent_app_date] => 1994-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 2909
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[patent_words_short_claim] => 193
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[pdf_file] => patents/05/533/05533205.pdf
[firstpage_image] =>[orig_patent_app_number] => 220326
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/220326 | Method and system for efficient bus allocation in a multimedia computer system | Mar 29, 1994 | Issued |
Array
(
[id] => 3530235
[patent_doc_number] => 05577215
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-19
[patent_title] => 'Data transmission circuit for digital signal processor chip and method therefor'
[patent_app_type] => 1
[patent_app_number] => 8/217896
[patent_app_country] => US
[patent_app_date] => 1994-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => patents/05/577/05577215.pdf
[firstpage_image] =>[orig_patent_app_number] => 217896
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/217896 | Data transmission circuit for digital signal processor chip and method therefor | Mar 24, 1994 | Issued |
| 08/214699 | METHOD OF AND APPARATUS FOR CONTROLLING DATA TRANSFER | Mar 17, 1994 | Abandoned |
| 08/210346 | METHOD AND APPARATUS FOR DECODING AND RECODING OF ADDRESSES | Mar 17, 1994 | Abandoned |
Array
(
[id] => 3531897
[patent_doc_number] => 05530811
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-25
[patent_title] => 'Behind backplane expansion board apparatus and method'
[patent_app_type] => 1
[patent_app_number] => 8/207318
[patent_app_country] => US
[patent_app_date] => 1994-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 3478
[patent_no_of_claims] => 14
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/530/05530811.pdf
[firstpage_image] =>[orig_patent_app_number] => 207318
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/207318 | Behind backplane expansion board apparatus and method | Mar 6, 1994 | Issued |
| 08/206382 | HIGHLY PIPELINED BUS ARCHITECTURE | Feb 28, 1994 | Abandoned |
Array
(
[id] => 3566365
[patent_doc_number] => 05519838
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-21
[patent_title] => 'Fast pipelined distributed arbitration scheme'
[patent_app_type] => 1
[patent_app_number] => 8/201186
[patent_app_country] => US
[patent_app_date] => 1994-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 7015
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/519/05519838.pdf
[firstpage_image] =>[orig_patent_app_number] => 201186
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/201186 | Fast pipelined distributed arbitration scheme | Feb 23, 1994 | Issued |
Array
(
[id] => 3526730
[patent_doc_number] => 05513358
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-30
[patent_title] => 'Method and apparatus for power-up state initialization in a data processing system'
[patent_app_type] => 1
[patent_app_number] => 8/191898
[patent_app_country] => US
[patent_app_date] => 1994-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2838
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[pdf_file] => patents/05/513/05513358.pdf
[firstpage_image] =>[orig_patent_app_number] => 191898
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/191898 | Method and apparatus for power-up state initialization in a data processing system | Feb 3, 1994 | Issued |
| 08/190969 | INTER-PROCESSOR DATA TRANSFER MANAGEMENT | Feb 2, 1994 | Abandoned |
| 08/190848 | DISPLAY APPARATUS | Feb 2, 1994 | Abandoned |
Array
(
[id] => 3626964
[patent_doc_number] => 05535400
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-09
[patent_title] => 'SCSI disk drive power down apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/188400
[patent_app_country] => US
[patent_app_date] => 1994-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/05/535/05535400.pdf
[firstpage_image] =>[orig_patent_app_number] => 188400
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/188400 | SCSI disk drive power down apparatus | Jan 27, 1994 | Issued |
Array
(
[id] => 3589254
[patent_doc_number] => 05524249
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-04
[patent_title] => 'Video subsystem power management apparatus and method'
[patent_app_type] => 1
[patent_app_number] => 8/191311
[patent_app_country] => US
[patent_app_date] => 1994-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/05/524/05524249.pdf
[firstpage_image] =>[orig_patent_app_number] => 191311
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/191311 | Video subsystem power management apparatus and method | Jan 26, 1994 | Issued |
Array
(
[id] => 3470289
[patent_doc_number] => 05473762
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-05
[patent_title] => 'Method and system for pipelining bus requests'
[patent_app_type] => 1
[patent_app_number] => 8/186381
[patent_app_country] => US
[patent_app_date] => 1994-01-25
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/473/05473762.pdf
[firstpage_image] =>[orig_patent_app_number] => 186381
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/186381 | Method and system for pipelining bus requests | Jan 24, 1994 | Issued |
| 08/179433 | METHOD AND APPARATUS FOR REDUCING POWER CONSUMPTION IN A COMPUTER SYSTEM | Jan 9, 1994 | Abandoned |
Array
(
[id] => 3668074
[patent_doc_number] => 05623680
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-22
[patent_title] => 'Finite state machine for process control'
[patent_app_type] => 1
[patent_app_number] => 8/174641
[patent_app_country] => US
[patent_app_date] => 1993-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[pdf_file] => patents/05/623/05623680.pdf
[firstpage_image] =>[orig_patent_app_number] => 174641
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/174641 | Finite state machine for process control | Dec 27, 1993 | Issued |
| 08/178396 | DATA BUS ARCHITECTURE COMPATIBLE WITH 32-BIT AND 64-BIT PROCESSORS | Dec 21, 1993 | Abandoned |