Alicia Ann Chevalier

Array ( [id] => 3556338 [patent_doc_number] => 05555394 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-10 [patent_title] => 'Data processor with the ability of fast partial clearing of buffer memory' [patent_app_type] => 1 [patent_app_number] => 8/115026 [patent_app_country] => US [patent_app_date] => 1993-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2239 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/555/05555394.pdf [firstpage_image] =>[orig_patent_app_number] => 115026 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3435487 [patent_doc_number] => 05459871 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-17 [patent_title] => 'Detection and resolution of resource deadlocks in a distributed data processing system' [patent_app_type] => 1 [patent_app_number] => 8/112776 [patent_app_country] => US [patent_app_date] => 1993-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 9035 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/459/05459871.pdf [firstpage_image] =>[orig_patent_app_number] => 112776 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3122548 [patent_doc_number] => 05465338 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-07 [patent_title] => 'Disk drive system interface architecture employing state machines' [patent_app_type] => 1 [patent_app_number] => 8/110883 [patent_app_country] => US [patent_app_date] => 1993-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 18129 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/465/05465338.pdf [firstpage_image] =>[orig_patent_app_number] => 110883 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3532829 [patent_doc_number] => 05530873 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-25 [patent_title] => 'Method and apparatus for processing interruption' [patent_app_type] => 1 [patent_app_number] => 8/100753 [patent_app_country] => US [patent_app_date] => 1993-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2304 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/530/05530873.pdf [firstpage_image] =>[orig_patent_app_number] => 100753 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3438943 [patent_doc_number] => 05455914 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-03 [patent_title] => 'Tie-breaking control circuit for bus modules which share command execution' [patent_app_type] => 1 [patent_app_number] => 8/097253 [patent_app_country] => US [patent_app_date] => 1993-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4340 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/455/05455914.pdf [firstpage_image] =>[orig_patent_app_number] => 097253 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3526304 [patent_doc_number] => 05513329 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-30 [patent_title] => 'Modular host local expansion upgrade' [patent_app_type] => 1 [patent_app_number] => 8/092179 [patent_app_country] => US [patent_app_date] => 1993-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3291 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/513/05513329.pdf [firstpage_image] =>[orig_patent_app_number] => 092179 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3637083 [patent_doc_number] => 05603037 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-11 [patent_title] => 'Clock disable circuit for translation buffer' [patent_app_type] => 1 [patent_app_number] => 8/052952 [patent_app_country] => US [patent_app_date] => 1993-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10450 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/603/05603037.pdf [firstpage_image] =>[orig_patent_app_number] => 052952 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3702089 [patent_doc_number] => 05664201 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-02 [patent_title] => 'Drive control system for microprocessor according to operational state and ambient temperature condition thereof' [patent_app_type] => 1 [patent_app_number] => 8/046072 [patent_app_country] => US [patent_app_date] => 1993-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5054 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/664/05664201.pdf [firstpage_image] =>[orig_patent_app_number] => 046072 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3561078 [patent_doc_number] => 05546548 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-13 [patent_title] => 'Arbiter and arbitration process for a dynamic and flexible prioritization' [patent_app_type] => 1 [patent_app_number] => 8/040518 [patent_app_country] => US [patent_app_date] => 1993-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 2347 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/546/05546548.pdf [firstpage_image] =>[orig_patent_app_number] => 040518 [rel_patent_id] =>[rel_patent_doc_number] =>)