Search

Alina A. Boutah

Examiner (ID: 19709)

Most Active Art Unit
2443
Art Unit(s)
2143, 2443, 2442, 2458
Total Applications
1211
Issued Applications
957
Pending Applications
98
Abandoned Applications
161

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18308675 [patent_doc_number] => 20230112575 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => ACCELERATOR FOR CONCURRENT INSERT AND LOOKUP OPERATIONS IN CUCKOO HASHING [patent_app_type] => utility [patent_app_number] => 18/080980 [patent_app_country] => US [patent_app_date] => 2022-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12656 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18080980 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/080980
ACCELERATOR FOR CONCURRENT INSERT AND LOOKUP OPERATIONS IN CUCKOO HASHING Dec 13, 2022 Pending
Array ( [id] => 18839255 [patent_doc_number] => 11847329 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Techniques for implementing fault domain sets [patent_app_type] => utility [patent_app_number] => 18/061765 [patent_app_country] => US [patent_app_date] => 2022-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10406 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18061765 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/061765
Techniques for implementing fault domain sets Dec 4, 2022 Issued
Array ( [id] => 18998043 [patent_doc_number] => 11914889 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Managing an adjustable write-to-read delay based on cycle counts in a memory sub-system [patent_app_type] => utility [patent_app_number] => 18/071930 [patent_app_country] => US [patent_app_date] => 2022-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7267 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18071930 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/071930
Managing an adjustable write-to-read delay based on cycle counts in a memory sub-system Nov 29, 2022 Issued
Array ( [id] => 19375726 [patent_doc_number] => 12067296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Storage device and method for accelerating storage device write and read speed using a turbo-write buffer [patent_app_type] => utility [patent_app_number] => 18/055133 [patent_app_country] => US [patent_app_date] => 2022-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 27 [patent_no_of_words] => 19959 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 482 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18055133 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/055133
Storage device and method for accelerating storage device write and read speed using a turbo-write buffer Nov 13, 2022 Issued
Array ( [id] => 20434227 [patent_doc_number] => 12504914 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-23 [patent_title] => Memory control circuit unit, memory storage device, and clock signal control method [patent_app_type] => utility [patent_app_number] => 17/978234 [patent_app_country] => US [patent_app_date] => 2022-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 1204 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17978234 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/978234
Memory control circuit unit, memory storage device, and clock signal control method Oct 31, 2022 Issued
Array ( [id] => 18195294 [patent_doc_number] => 20230048813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => METHOD OF STORING DATA AND METHOD OF READING DATA [patent_app_type] => utility [patent_app_number] => 17/974428 [patent_app_country] => US [patent_app_date] => 2022-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4774 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17974428 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/974428
METHOD OF STORING DATA AND METHOD OF READING DATA Oct 25, 2022 Abandoned
Array ( [id] => 18192373 [patent_doc_number] => 20230045892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => STORAGE DEVICE, AN OPERATION METHOD OF A STORAGE SYSTEM INCLUDING THE STORAGE DEVICE, AND A HOST DEVICE CONTROLLING THE STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/969959 [patent_app_country] => US [patent_app_date] => 2022-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22100 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17969959 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/969959
Storage device including a turbo write buffer divided into a non-pinned buffer area and a pinned buffer area, an operation method of a storage system including the storage device in which data of the non-pinned and pinned buffer areas are flushed differently, and a host device controlling the storage device Oct 19, 2022 Issued
Array ( [id] => 19375386 [patent_doc_number] => 12066951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Page table hooks to memory types [patent_app_type] => utility [patent_app_number] => 17/964720 [patent_app_country] => US [patent_app_date] => 2022-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 17336 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17964720 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/964720
Page table hooks to memory types Oct 11, 2022 Issued
Array ( [id] => 19522656 [patent_doc_number] => 12124379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-22 [patent_title] => Management circuitry for a least recently used memory management process [patent_app_type] => utility [patent_app_number] => 17/961473 [patent_app_country] => US [patent_app_date] => 2022-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7146 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17961473 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/961473
Management circuitry for a least recently used memory management process Oct 5, 2022 Issued
Array ( [id] => 18599082 [patent_doc_number] => 20230273882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => SYSTEMS AND METHODS FOR TAPE DATA ACCESS [patent_app_type] => utility [patent_app_number] => 17/936328 [patent_app_country] => US [patent_app_date] => 2022-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3610 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17936328 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/936328
SYSTEMS AND METHODS FOR TAPE DATA ACCESS Sep 27, 2022 Abandoned
Array ( [id] => 19963658 [patent_doc_number] => 12333166 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Memory system that controls timing of refresh operation [patent_app_type] => utility [patent_app_number] => 17/899426 [patent_app_country] => US [patent_app_date] => 2022-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 3261 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899426 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/899426
Memory system that controls timing of refresh operation Aug 29, 2022 Issued
Array ( [id] => 18989632 [patent_doc_number] => 20240061601 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => ADAPTIVE MEMORY PARTITION CLOSURE TIME [patent_app_type] => utility [patent_app_number] => 17/892581 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10315 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892581 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/892581
Adaptive memory partition closure time Aug 21, 2022 Issued
Array ( [id] => 19413322 [patent_doc_number] => 12079138 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-03 [patent_title] => Efficient address translation [patent_app_type] => utility [patent_app_number] => 17/892879 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 9069 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892879 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/892879
Efficient address translation Aug 21, 2022 Issued
Array ( [id] => 19810982 [patent_doc_number] => 12242374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Logical address granularity configurations for logical address space partitions [patent_app_type] => utility [patent_app_number] => 17/892535 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9630 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892535 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/892535
Logical address granularity configurations for logical address space partitions Aug 21, 2022 Issued
Array ( [id] => 20434203 [patent_doc_number] => 12504881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-23 [patent_title] => Rate adjustments for a memory interface [patent_app_type] => utility [patent_app_number] => 17/889660 [patent_app_country] => US [patent_app_date] => 2022-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 9105 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17889660 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/889660
Rate adjustments for a memory interface Aug 16, 2022 Issued
Array ( [id] => 18973813 [patent_doc_number] => 20240053905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => COMPRESSION AND DECOMPRESSION OF TRIM DATA [patent_app_type] => utility [patent_app_number] => 17/888309 [patent_app_country] => US [patent_app_date] => 2022-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16224 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17888309 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/888309
COMPRESSION AND DECOMPRESSION OF TRIM DATA Aug 14, 2022 Pending
Array ( [id] => 18519720 [patent_doc_number] => 11709611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Determining and using memory unit partitioning solutions for reconfigurable dataflow computing systems [patent_app_type] => utility [patent_app_number] => 17/878504 [patent_app_country] => US [patent_app_date] => 2022-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 27 [patent_no_of_words] => 12049 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17878504 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/878504
Determining and using memory unit partitioning solutions for reconfigurable dataflow computing systems Jul 31, 2022 Issued
Array ( [id] => 18038260 [patent_doc_number] => 20220382476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => EXPANDING DATA STRUCTURES IN A STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 17/877300 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25342 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17877300 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/877300
Expanding data structures in a storage system Jul 28, 2022 Issued
Array ( [id] => 18370576 [patent_doc_number] => 11650748 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-05-16 [patent_title] => Method of delayed execution of eBPF function in computational storage [patent_app_type] => utility [patent_app_number] => 17/814140 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 12077 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814140 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/814140
Method of delayed execution of eBPF function in computational storage Jul 20, 2022 Issued
Array ( [id] => 19795166 [patent_doc_number] => 12236116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Systems and methods for selectively controlling programming operations of a memory system comprising a plurality of super blocks [patent_app_type] => utility [patent_app_number] => 17/868147 [patent_app_country] => US [patent_app_date] => 2022-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 21 [patent_no_of_words] => 11584 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 449 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17868147 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/868147
Systems and methods for selectively controlling programming operations of a memory system comprising a plurality of super blocks Jul 18, 2022 Issued
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