Search

Alina A. Boutah

Examiner (ID: 19709)

Most Active Art Unit
2443
Art Unit(s)
2143, 2443, 2442, 2458
Total Applications
1211
Issued Applications
957
Pending Applications
98
Abandoned Applications
161

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18224173 [patent_doc_number] => 20230063167 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => INTERNAL RESOURCE MONITORING IN MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/464023 [patent_app_country] => US [patent_app_date] => 2021-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7891 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17464023 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/464023
Internal resource monitoring in memory devices Aug 31, 2021 Issued
Array ( [id] => 17276446 [patent_doc_number] => 20210382644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => METHOD AND DEVICE FOR DIVIDING STORAGE DEVICES INTO DEVICE GROUPS [patent_app_type] => utility [patent_app_number] => 17/408610 [patent_app_country] => US [patent_app_date] => 2021-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17408610 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/408610
Method and device for dividing storage devices into device groups Aug 22, 2021 Issued
Array ( [id] => 18194614 [patent_doc_number] => 20230048133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => ADAPTIVE DATA RELOCATION FOR IMPROVED DATA MANAGEMENT FOR MEMORY [patent_app_type] => utility [patent_app_number] => 17/400935 [patent_app_country] => US [patent_app_date] => 2021-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17281 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17400935 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/400935
Adaptive data relocation for improved data management for memory Aug 11, 2021 Issued
Array ( [id] => 19340583 [patent_doc_number] => 12050773 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Completion flag for memory operations [patent_app_type] => utility [patent_app_number] => 17/400942 [patent_app_country] => US [patent_app_date] => 2021-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 19186 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17400942 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/400942
Completion flag for memory operations Aug 11, 2021 Issued
Array ( [id] => 17245641 [patent_doc_number] => 20210365385 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => METHODS OF MEMORY ADDRESS VERIFICATION AND MEMORY DEVICES EMPLOYING THE SAME [patent_app_type] => utility [patent_app_number] => 17/397449 [patent_app_country] => US [patent_app_date] => 2021-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5174 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17397449 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/397449
Methods of memory address verification and memory devices employing the same Aug 8, 2021 Issued
Array ( [id] => 18425081 [patent_doc_number] => 20230179546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => PROCESSOR AND IMPLEMENTATION METHOD, ELECTRONIC DEVICE, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/792867 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5420 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17792867 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/792867
Method for improving data flow and access for a neural network processor Aug 4, 2021 Issued
Array ( [id] => 18425081 [patent_doc_number] => 20230179546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => PROCESSOR AND IMPLEMENTATION METHOD, ELECTRONIC DEVICE, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/792867 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5420 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17792867 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/792867
Method for improving data flow and access for a neural network processor Aug 4, 2021 Issued
Array ( [id] => 18425081 [patent_doc_number] => 20230179546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => PROCESSOR AND IMPLEMENTATION METHOD, ELECTRONIC DEVICE, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/792867 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5420 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17792867 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/792867
Method for improving data flow and access for a neural network processor Aug 4, 2021 Issued
Array ( [id] => 19327808 [patent_doc_number] => 12045495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Read latency and suspend modes [patent_app_type] => utility [patent_app_number] => 17/395295 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 16892 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395295 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/395295
Read latency and suspend modes Aug 4, 2021 Issued
Array ( [id] => 18425081 [patent_doc_number] => 20230179546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => PROCESSOR AND IMPLEMENTATION METHOD, ELECTRONIC DEVICE, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/792867 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5420 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17792867 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/792867
Method for improving data flow and access for a neural network processor Aug 4, 2021 Issued
Array ( [id] => 17484276 [patent_doc_number] => 20220091780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => MEMORY ACCESS METHOD AND INTELLIGENT PROCESSING APPARATUS [patent_app_type] => utility [patent_app_number] => 17/393444 [patent_app_country] => US [patent_app_date] => 2021-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4764 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17393444 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/393444
MEMORY ACCESS METHOD AND INTELLIGENT PROCESSING APPARATUS Aug 3, 2021 Abandoned
Array ( [id] => 18795847 [patent_doc_number] => 11829634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Consistent governance with asset constraints across data storage locations [patent_app_type] => utility [patent_app_number] => 17/387404 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8479 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17387404 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/387404
Consistent governance with asset constraints across data storage locations Jul 27, 2021 Issued
Array ( [id] => 17475745 [patent_doc_number] => 20220083249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => METHOD OF OPERATING MEMORY DEVICE AND HOST DEVICE, AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/369884 [patent_app_country] => US [patent_app_date] => 2021-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8378 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17369884 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/369884
Method of operating memory device and host device, and memory system including partitioning purge region responsive to purge information Jul 6, 2021 Issued
Array ( [id] => 18095398 [patent_doc_number] => 20220413739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => OVER PROVISIONING COMPONENT FOR MEMORY MANAGEMENT [patent_app_type] => utility [patent_app_number] => 17/357496 [patent_app_country] => US [patent_app_date] => 2021-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17357496 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/357496
Over provisioning component for memory management Jun 23, 2021 Issued
Array ( [id] => 17301541 [patent_doc_number] => 20210397380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => DYNAMIC PAGE ACTIVATION [patent_app_type] => utility [patent_app_number] => 17/349616 [patent_app_country] => US [patent_app_date] => 2021-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18235 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17349616 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/349616
DYNAMIC PAGE ACTIVATION Jun 15, 2021 Abandoned
Array ( [id] => 18356603 [patent_doc_number] => 11645003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Memory system generating parity data based on written data and control method [patent_app_type] => utility [patent_app_number] => 17/348412 [patent_app_country] => US [patent_app_date] => 2021-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8413 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17348412 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/348412
Memory system generating parity data based on written data and control method Jun 14, 2021 Issued
Array ( [id] => 18506236 [patent_doc_number] => 11704050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => Memory system for determining a memory area in which a journal is stored according to a number of free memory blocks [patent_app_type] => utility [patent_app_number] => 17/342007 [patent_app_country] => US [patent_app_date] => 2021-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10267 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17342007 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/342007
Memory system for determining a memory area in which a journal is stored according to a number of free memory blocks Jun 7, 2021 Issued
Array ( [id] => 17940246 [patent_doc_number] => 11474699 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-10-18 [patent_title] => Systems and methods for optimizing data management within key value storage [patent_app_type] => utility [patent_app_number] => 17/340573 [patent_app_country] => US [patent_app_date] => 2021-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 6104 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17340573 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/340573
Systems and methods for optimizing data management within key value storage Jun 6, 2021 Issued
Array ( [id] => 17861502 [patent_doc_number] => 11442658 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-09-13 [patent_title] => System and method for selecting a write unit size for a block storage device [patent_app_type] => utility [patent_app_number] => 17/333208 [patent_app_country] => US [patent_app_date] => 2021-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6787 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17333208 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/333208
System and method for selecting a write unit size for a block storage device May 27, 2021 Issued
Array ( [id] => 17216304 [patent_doc_number] => 20210349642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-11 [patent_title] => Channel Optimized Storage Modules [patent_app_type] => utility [patent_app_number] => 17/327153 [patent_app_country] => US [patent_app_date] => 2021-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6797 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17327153 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/327153
Channel optimized storage modules May 20, 2021 Issued
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