Allan R. Wilson

Array ( [id] => 1090058 [patent_doc_number] => 06828609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-07 [patent_title] => 'High-voltage semiconductor component' [patent_app_type] => B2 [patent_app_number] => 10/455834 [patent_app_country] => US [patent_app_date] => 2003-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 6784 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/828/06828609.pdf [firstpage_image] =>[orig_patent_app_number] => 10455834 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6805083 [patent_doc_number] => 20030232477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-18 [patent_title] => 'High-voltage semiconductor component' [patent_app_type] => new [patent_app_number] => 10/455858 [patent_app_country] => US [patent_app_date] => 2003-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6865 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20030232477.pdf [firstpage_image] =>[orig_patent_app_number] => 10455858 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 951593 [patent_doc_number] => 06960798 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-01 [patent_title] => 'High-voltage semiconductor component' [patent_app_type] => utility [patent_app_number] => 10/455842 [patent_app_country] => US [patent_app_date] => 2003-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 20 [patent_no_of_words] => 6800 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/960/06960798.pdf [firstpage_image] =>[orig_patent_app_number] => 10455842 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 985821 [patent_doc_number] => 06924554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-02 [patent_title] => 'Wirebond structure and method to connect to a microelectronic die' [patent_app_type] => utility [patent_app_number] => 10/454979 [patent_app_country] => US [patent_app_date] => 2003-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 2696 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/924/06924554.pdf [firstpage_image] =>[orig_patent_app_number] => 10454979 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7368596 [patent_doc_number] => 20040026725 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'Single transistor ferroelectric memory cell, device and method for the formation of the same incorporating a high temperature ferroelectric gate dielectric' [patent_app_type] => new [patent_app_number] => 10/455494 [patent_app_country] => US [patent_app_date] => 2003-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5171 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20040026725.pdf [firstpage_image] =>[orig_patent_app_number] => 10455494 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 738942 [patent_doc_number] => 07034378 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-25 [patent_title] => 'Fuse structure used in an integrated circuit device' [patent_app_type] => utility [patent_app_number] => 10/439731 [patent_app_country] => US [patent_app_date] => 2003-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2270 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/034/07034378.pdf [firstpage_image] =>[orig_patent_app_number] => 10439731 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1153033 [patent_doc_number] => 06770932 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-03 [patent_title] => 'Semiconductor memory device having a memory region and a peripheral region, and a manufacturing method thereof' [patent_app_type] => B2 [patent_app_number] => 10/436261 [patent_app_country] => US [patent_app_date] => 2003-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 133 [patent_no_of_words] => 9062 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/770/06770932.pdf [firstpage_image] =>[orig_patent_app_number] => 10436261 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6662182 [patent_doc_number] => 20030201508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'SOI substrate, element substrate, semiconductor device, electro-optical apparatus, electronic equipment, method of manufacturing the SOI substrate, method of manufacturing the element substrate, and method of manufacturing the electro-optical apparatus' [patent_app_type] => new [patent_app_number] => 10/431401 [patent_app_country] => US [patent_app_date] => 2003-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 31397 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20030201508.pdf [firstpage_image] =>[orig_patent_app_number] => 10431401 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4644371 [patent_doc_number] => 08021976 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-20 [patent_title] => 'Method of wire bonding over active area of a semiconductor circuit' [patent_app_type] => utility [patent_app_number] => 10/434142 [patent_app_country] => US [patent_app_date] => 2003-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 4360 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 365 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/021/08021976.pdf [firstpage_image] =>[orig_patent_app_number] => 10434142 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7427425 [patent_doc_number] => 20040007739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-15 [patent_title] => 'Semiconductor substrate, semiconductor device, and processes of production of same' [patent_app_type] => new [patent_app_number] => 10/429503 [patent_app_country] => US [patent_app_date] => 2003-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7150 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20040007739.pdf [firstpage_image] =>[orig_patent_app_number] => 10429503 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6723464 [patent_doc_number] => 20030205776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-06 [patent_title] => 'Non-volatile semiconductor memory device and its manufacturing method' [patent_app_type] => new [patent_app_number] => 10/429460 [patent_app_country] => US [patent_app_date] => 2003-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 11724 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20030205776.pdf [firstpage_image] =>[orig_patent_app_number] => 10429460 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1093901 [patent_doc_number] => 06825521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-30 [patent_title] => 'Semiconductor device with capacitor' [patent_app_type] => B2 [patent_app_number] => 10/424712 [patent_app_country] => US [patent_app_date] => 2003-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 38 [patent_no_of_words] => 7470 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/825/06825521.pdf [firstpage_image] =>[orig_patent_app_number] => 10424712 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1193785 [patent_doc_number] => 06730980 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-04 [patent_title] => 'Multi-trench region for accumulation of photo-generated charge in a CMOS imager' [patent_app_type] => B2 [patent_app_number] => 10/424807 [patent_app_country] => US [patent_app_date] => 2003-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 7151 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/730/06730980.pdf [firstpage_image] =>[orig_patent_app_number] => 10424807 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6807234 [patent_doc_number] => 20030197173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-23 [patent_title] => 'Solid image pickup device and method for producing the same' [patent_app_type] => new [patent_app_number] => 10/420706 [patent_app_country] => US [patent_app_date] => 2003-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4480 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20030197173.pdf [firstpage_image] =>[orig_patent_app_number] => 10420706 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6662158 [patent_doc_number] => 20030201484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'Semiconductor capacitive element, method for manufacturing same and semiconductor device provided with same' [patent_app_type] => new [patent_app_number] => 10/421482 [patent_app_country] => US [patent_app_date] => 2003-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9683 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20030201484.pdf [firstpage_image] =>[orig_patent_app_number] => 10421482 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1102734 [patent_doc_number] => 06815795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-09 [patent_title] => 'High voltage resistive structure integrated on a semiconductor substrate' [patent_app_type] => B2 [patent_app_number] => 10/420386 [patent_app_country] => US [patent_app_date] => 2003-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 13 [patent_no_of_words] => 3021 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/815/06815795.pdf [firstpage_image] =>[orig_patent_app_number] => 10420386 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1136489 [patent_doc_number] => 06784510 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-31 [patent_title] => 'Magnetoresistive random access memory device structures' [patent_app_type] => B1 [patent_app_number] => 10/417851 [patent_app_country] => US [patent_app_date] => 2003-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3781 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/784/06784510.pdf [firstpage_image] =>[orig_patent_app_number] => 10417851 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1066154 [patent_doc_number] => 06847065 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-01-25 [patent_title] => 'Radiation-hardened transistor fabricated by modified CMOS process' [patent_app_type] => utility [patent_app_number] => 10/417021 [patent_app_country] => US [patent_app_date] => 2003-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2741 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/847/06847065.pdf [firstpage_image] =>[orig_patent_app_number] => 10417021 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1159564 [patent_doc_number] => 06762467 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-13 [patent_title] => 'Nonvolatile memory cell for prevention of second bit effect' [patent_app_type] => B2 [patent_app_number] => 10/412592 [patent_app_country] => US [patent_app_date] => 2003-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1722 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/762/06762467.pdf [firstpage_image] =>[orig_patent_app_number] => 10412592 [rel_patent_id] =>[rel_patent_doc_number] =>)