Search

Allan R. Wilson

Examiner (ID: 12196, Phone: (571)272-1738 , Office: P/2897 )

Most Active Art Unit
2897
Art Unit(s)
2897, 2503, 3621, 2815
Total Applications
1911
Issued Applications
1758
Pending Applications
18
Abandoned Applications
144

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7457264 [patent_doc_number] => 20040119169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => 'RADIO FREQUENCY INTEGRATED CIRCUIT HAVING INCREASED SUBSTRATE RESISTANCE ENABLING THREE DIMENSIONAL INTERCONNECTION WITH FEEDTHROUGHS' [patent_app_type] => new [patent_app_number] => 10/328213 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2219 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20040119169.pdf [firstpage_image] =>[orig_patent_app_number] => 10328213 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/328213
Radio frequency integrated circuit having increased substrate resistance enabling three dimensional interconnection with feedthroughs Dec 22, 2002 Issued
Array ( [id] => 1077305 [patent_doc_number] => 07615822 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-11-10 [patent_title] => 'Diffused drain transistor' [patent_app_type] => utility [patent_app_number] => 10/327794 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 3788 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 295 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/615/07615822.pdf [firstpage_image] =>[orig_patent_app_number] => 10327794 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/327794
Diffused drain transistor Dec 22, 2002 Issued
Array ( [id] => 6758801 [patent_doc_number] => 20030122162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Method for forming conductors in semiconductor devices' [patent_app_type] => new [patent_app_number] => 10/329180 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5319 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20030122162.pdf [firstpage_image] =>[orig_patent_app_number] => 10329180 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/329180
Method for forming conductors in semiconductor devices Dec 22, 2002 Issued
Array ( [id] => 1254422 [patent_doc_number] => 06670713 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-30 [patent_title] => 'Method for forming conductors in semiconductor devices' [patent_app_type] => B2 [patent_app_number] => 10/326690 [patent_app_country] => US [patent_app_date] => 2002-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 33 [patent_no_of_words] => 5317 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/670/06670713.pdf [firstpage_image] =>[orig_patent_app_number] => 10326690 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/326690
Method for forming conductors in semiconductor devices Dec 19, 2002 Issued
Array ( [id] => 1056935 [patent_doc_number] => 06856004 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-15 [patent_title] => 'Compact layout for a semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/327512 [patent_app_country] => US [patent_app_date] => 2002-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 4584 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/856/06856004.pdf [firstpage_image] =>[orig_patent_app_number] => 10327512 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/327512
Compact layout for a semiconductor device Dec 18, 2002 Issued
Array ( [id] => 7625081 [patent_doc_number] => 06724089 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-20 [patent_title] => 'Dual damascene interconnect' [patent_app_type] => B2 [patent_app_number] => 10/317265 [patent_app_country] => US [patent_app_date] => 2002-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3919 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/724/06724089.pdf [firstpage_image] =>[orig_patent_app_number] => 10317265 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/317265
Dual damascene interconnect Dec 10, 2002 Issued
Array ( [id] => 6827598 [patent_doc_number] => 20030178656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-25 [patent_title] => 'Manufacturing method of electro line for liquid crystal display device' [patent_app_type] => new [patent_app_number] => 10/315151 [patent_app_country] => US [patent_app_date] => 2002-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4045 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20030178656.pdf [firstpage_image] =>[orig_patent_app_number] => 10315151 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/315151
Manufacturing method of electro line for liquid crystal display device Dec 9, 2002 Issued
Array ( [id] => 7612442 [patent_doc_number] => 06903394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-07 [patent_title] => 'CMOS imager with improved color response' [patent_app_type] => utility [patent_app_number] => 10/305075 [patent_app_country] => US [patent_app_date] => 2002-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3543 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/903/06903394.pdf [firstpage_image] =>[orig_patent_app_number] => 10305075 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/305075
CMOS imager with improved color response Nov 26, 2002 Issued
Array ( [id] => 6794699 [patent_doc_number] => 20030173572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Retrograde well structure for a CMOS imager' [patent_app_type] => new [patent_app_number] => 10/295952 [patent_app_country] => US [patent_app_date] => 2002-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5809 [patent_no_of_claims] => 119 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 15 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0173/20030173572.pdf [firstpage_image] =>[orig_patent_app_number] => 10295952 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/295952
Retrograde well structure for a CMOS imager Nov 17, 2002 Issued
Array ( [id] => 1167713 [patent_doc_number] => 06759705 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-06 [patent_title] => 'Platinum-rhodium stack as an oxygen barrier in an integrated circuit capacitor' [patent_app_type] => B2 [patent_app_number] => 10/268482 [patent_app_country] => US [patent_app_date] => 2002-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4661 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/759/06759705.pdf [firstpage_image] =>[orig_patent_app_number] => 10268482 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/268482
Platinum-rhodium stack as an oxygen barrier in an integrated circuit capacitor Oct 9, 2002 Issued
Array ( [id] => 1082869 [patent_doc_number] => 06833297 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-12-21 [patent_title] => 'Method for reducing drain induced barrier lowering in a memory device' [patent_app_type] => B1 [patent_app_number] => 10/265001 [patent_app_country] => US [patent_app_date] => 2002-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2794 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/833/06833297.pdf [firstpage_image] =>[orig_patent_app_number] => 10265001 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/265001
Method for reducing drain induced barrier lowering in a memory device Oct 3, 2002 Issued
Array ( [id] => 1043651 [patent_doc_number] => 06867084 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-15 [patent_title] => 'Gate structure and method of forming the gate dielectric with mini-spacer' [patent_app_type] => utility [patent_app_number] => 10/263541 [patent_app_country] => US [patent_app_date] => 2002-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2852 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/867/06867084.pdf [firstpage_image] =>[orig_patent_app_number] => 10263541 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/263541
Gate structure and method of forming the gate dielectric with mini-spacer Oct 2, 2002 Issued
Array ( [id] => 1180182 [patent_doc_number] => 06744083 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-01 [patent_title] => 'Submicron MOSFET having asymmetric channel profile' [patent_app_type] => B2 [patent_app_number] => 10/263111 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 3017 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/744/06744083.pdf [firstpage_image] =>[orig_patent_app_number] => 10263111 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/263111
Submicron MOSFET having asymmetric channel profile Sep 30, 2002 Issued
Array ( [id] => 6781151 [patent_doc_number] => 20030062598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Method for manufacturing and structure of semiconductor device with sinker contact region' [patent_app_type] => new [patent_app_number] => 10/262211 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3320 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20030062598.pdf [firstpage_image] =>[orig_patent_app_number] => 10262211 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/262211
Method for manufacturing a semiconductor device with sinker contact region Sep 29, 2002 Issued
Array ( [id] => 7623526 [patent_doc_number] => 06686639 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-03 [patent_title] => 'High performance MEMS device fabricatable with high yield' [patent_app_type] => B1 [patent_app_number] => 10/260662 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4846 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 9 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/686/06686639.pdf [firstpage_image] =>[orig_patent_app_number] => 10260662 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/260662
High performance MEMS device fabricatable with high yield Sep 29, 2002 Issued
Array ( [id] => 1085663 [patent_doc_number] => 06831008 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-12-14 [patent_title] => 'Nickel silicidesilicon nitride adhesion through surface passivation' [patent_app_type] => B2 [patent_app_number] => 10/261791 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2311 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/831/06831008.pdf [firstpage_image] =>[orig_patent_app_number] => 10261791 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/261791
Nickel silicidesilicon nitride adhesion through surface passivation Sep 29, 2002 Issued
Array ( [id] => 1043630 [patent_doc_number] => 06867063 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-15 [patent_title] => 'Organic spin-on anti-reflective coating over inorganic anti-reflective coating' [patent_app_type] => utility [patent_app_number] => 10/262221 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4071 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/867/06867063.pdf [firstpage_image] =>[orig_patent_app_number] => 10262221 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/262221
Organic spin-on anti-reflective coating over inorganic anti-reflective coating Sep 29, 2002 Issued
Array ( [id] => 1180218 [patent_doc_number] => 06744087 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-01 [patent_title] => 'Non-volatile memory using ferroelectric gate field-effect transistors' [patent_app_type] => B2 [patent_app_number] => 10/256881 [patent_app_country] => US [patent_app_date] => 2002-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 31 [patent_no_of_words] => 16862 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/744/06744087.pdf [firstpage_image] =>[orig_patent_app_number] => 10256881 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/256881
Non-volatile memory using ferroelectric gate field-effect transistors Sep 26, 2002 Issued
Array ( [id] => 1093883 [patent_doc_number] => 06825513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-30 [patent_title] => 'High power mosfet semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/260611 [patent_app_country] => US [patent_app_date] => 2002-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 929 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/825/06825513.pdf [firstpage_image] =>[orig_patent_app_number] => 10260611 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/260611
High power mosfet semiconductor device Sep 26, 2002 Issued
Array ( [id] => 6671878 [patent_doc_number] => 20030057481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'RAM' [patent_app_type] => new [patent_app_number] => 10/255392 [patent_app_country] => US [patent_app_date] => 2002-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6899 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20030057481.pdf [firstpage_image] =>[orig_patent_app_number] => 10255392 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/255392
RAM Sep 25, 2002 Issued
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