Search

Allan R. Wilson

Examiner (ID: 12196, Phone: (571)272-1738 , Office: P/2897 )

Most Active Art Unit
2897
Art Unit(s)
2897, 2503, 3621, 2815
Total Applications
1911
Issued Applications
1758
Pending Applications
18
Abandoned Applications
144

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1340656 [patent_doc_number] => 06593635 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-15 [patent_title] => 'Light receiving semiconductor device with PIN structure' [patent_app_type] => B2 [patent_app_number] => 10/188372 [patent_app_country] => US [patent_app_date] => 2002-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 4724 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/593/06593635.pdf [firstpage_image] =>[orig_patent_app_number] => 10188372 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/188372
Light receiving semiconductor device with PIN structure Jul 2, 2002 Issued
Array ( [id] => 1300034 [patent_doc_number] => 06627945 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-30 [patent_title] => 'Memory device and method of making' [patent_app_type] => B1 [patent_app_number] => 10/189651 [patent_app_country] => US [patent_app_date] => 2002-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 6081 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/627/06627945.pdf [firstpage_image] =>[orig_patent_app_number] => 10189651 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/189651
Memory device and method of making Jul 2, 2002 Issued
Array ( [id] => 6720926 [patent_doc_number] => 20030054615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'Switching field effect transistor using abrupt metal-insulator transition' [patent_app_type] => new [patent_app_number] => 10/188522 [patent_app_country] => US [patent_app_date] => 2002-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2899 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20030054615.pdf [firstpage_image] =>[orig_patent_app_number] => 10188522 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/188522
Switching field effect transistor using abrupt metal-insulator transition Jul 1, 2002 Issued
Array ( [id] => 1257224 [patent_doc_number] => 06667516 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-23 [patent_title] => 'RF LDMOS on partial SOI substrate' [patent_app_type] => B2 [patent_app_number] => 10/186528 [patent_app_country] => US [patent_app_date] => 2002-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2307 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/667/06667516.pdf [firstpage_image] =>[orig_patent_app_number] => 10186528 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/186528
RF LDMOS on partial SOI substrate Jun 30, 2002 Issued
Array ( [id] => 6535843 [patent_doc_number] => 20020163042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-07 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/187068 [patent_app_country] => US [patent_app_date] => 2002-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 13204 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20020163042.pdf [firstpage_image] =>[orig_patent_app_number] => 10187068 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/187068
Semiconductor device Jun 27, 2002 Issued
Array ( [id] => 1352121 [patent_doc_number] => 06583476 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-24 [patent_title] => 'Electrostatic discharge protection for integrated semiconductor devices using channel stop field plates' [patent_app_type] => B1 [patent_app_number] => 10/187224 [patent_app_country] => US [patent_app_date] => 2002-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3073 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/583/06583476.pdf [firstpage_image] =>[orig_patent_app_number] => 10187224 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/187224
Electrostatic discharge protection for integrated semiconductor devices using channel stop field plates Jun 27, 2002 Issued
Array ( [id] => 6849342 [patent_doc_number] => 20030141544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-31 [patent_title] => 'MEMORY CELL WITH REDUCED COUPLING BETWEEN PASS TRANSISTOR AND DRIVE TRANSISTOR BODIES AND METHOD' [patent_app_type] => new [patent_app_number] => 10/183086 [patent_app_country] => US [patent_app_date] => 2002-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2888 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20030141544.pdf [firstpage_image] =>[orig_patent_app_number] => 10183086 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/183086
Memory cell with reduced coupling between pass transistor and drive transistor bodies and method Jun 25, 2002 Issued
Array ( [id] => 1310050 [patent_doc_number] => 06617656 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-09 [patent_title] => 'EDMOS device having a lattice type drift region' [patent_app_type] => B2 [patent_app_number] => 10/179492 [patent_app_country] => US [patent_app_date] => 2002-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 3491 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/617/06617656.pdf [firstpage_image] =>[orig_patent_app_number] => 10179492 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/179492
EDMOS device having a lattice type drift region Jun 23, 2002 Issued
Array ( [id] => 1309940 [patent_doc_number] => 06617639 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-09 [patent_title] => 'Use of high-K dielectric material for ONO and tunnel oxide to improve floating gate flash memory coupling' [patent_app_type] => B1 [patent_app_number] => 10/176594 [patent_app_country] => US [patent_app_date] => 2002-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 9034 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/617/06617639.pdf [firstpage_image] =>[orig_patent_app_number] => 10176594 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/176594
Use of high-K dielectric material for ONO and tunnel oxide to improve floating gate flash memory coupling Jun 20, 2002 Issued
Array ( [id] => 1276910 [patent_doc_number] => 06649986 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-18 [patent_title] => 'Semiconductor device with structure for die or dice crack detection' [patent_app_type] => B1 [patent_app_number] => 10/172971 [patent_app_country] => US [patent_app_date] => 2002-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5232 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/649/06649986.pdf [firstpage_image] =>[orig_patent_app_number] => 10172971 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/172971
Semiconductor device with structure for die or dice crack detection Jun 17, 2002 Issued
Array ( [id] => 6317164 [patent_doc_number] => 20020195703 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-26 [patent_title] => 'Semiconductor electronic parts' [patent_app_type] => new [patent_app_number] => 10/174111 [patent_app_country] => US [patent_app_date] => 2002-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4756 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20020195703.pdf [firstpage_image] =>[orig_patent_app_number] => 10174111 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/174111
Semiconductor electronic parts Jun 17, 2002 Issued
Array ( [id] => 1293468 [patent_doc_number] => 06630728 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-07 [patent_title] => 'Plastic integrated circuit package and leadframe for making the package' [patent_app_type] => B2 [patent_app_number] => 10/171702 [patent_app_country] => US [patent_app_date] => 2002-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 7604 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/630/06630728.pdf [firstpage_image] =>[orig_patent_app_number] => 10171702 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/171702
Plastic integrated circuit package and leadframe for making the package Jun 13, 2002 Issued
Array ( [id] => 1281152 [patent_doc_number] => 06646294 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-11 [patent_title] => 'Circuit configuration with a plurality of transistors of two different conductivity types' [patent_app_type] => B2 [patent_app_number] => 10/170290 [patent_app_country] => US [patent_app_date] => 2002-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2991 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/646/06646294.pdf [firstpage_image] =>[orig_patent_app_number] => 10170290 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/170290
Circuit configuration with a plurality of transistors of two different conductivity types Jun 12, 2002 Issued
Array ( [id] => 1300209 [patent_doc_number] => 06627979 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-30 [patent_title] => 'Semiconductor package and fabrication method of the same' [patent_app_type] => B2 [patent_app_number] => 10/167702 [patent_app_country] => US [patent_app_date] => 2002-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 2429 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/627/06627979.pdf [firstpage_image] =>[orig_patent_app_number] => 10167702 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/167702
Semiconductor package and fabrication method of the same Jun 11, 2002 Issued
Array ( [id] => 1395283 [patent_doc_number] => 06548841 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-15 [patent_title] => 'Nanomechanical switches and circuits' [patent_app_type] => B2 [patent_app_number] => 10/165024 [patent_app_country] => US [patent_app_date] => 2002-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 47 [patent_no_of_words] => 6556 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/548/06548841.pdf [firstpage_image] =>[orig_patent_app_number] => 10165024 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/165024
Nanomechanical switches and circuits Jun 6, 2002 Issued
Array ( [id] => 6254528 [patent_doc_number] => 20020185705 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-12 [patent_title] => 'Power semiconductor device having RESURF layer' [patent_app_type] => new [patent_app_number] => 10/163651 [patent_app_country] => US [patent_app_date] => 2002-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 61 [patent_no_of_words] => 28677 [patent_no_of_claims] => 71 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20020185705.pdf [firstpage_image] =>[orig_patent_app_number] => 10163651 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/163651
Power semiconductor device having RESURF layer Jun 6, 2002 Issued
Array ( [id] => 6170227 [patent_doc_number] => 20020153584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-24 [patent_title] => 'Nanomechanical switches and circuits' [patent_app_type] => new [patent_app_number] => 10/165698 [patent_app_country] => US [patent_app_date] => 2002-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6497 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20020153584.pdf [firstpage_image] =>[orig_patent_app_number] => 10165698 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/165698
Nanomechanical switches and circuits Jun 6, 2002 Issued
Array ( [id] => 7259930 [patent_doc_number] => 20040149999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'lll group nitride based semiconductor luminescent element' [patent_app_type] => new [patent_app_number] => 10/479602 [patent_app_country] => US [patent_app_date] => 2003-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5147 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20040149999.pdf [firstpage_image] =>[orig_patent_app_number] => 10479602 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/479602
Group III nitride based semiconductor luminescent element Jun 2, 2002 Issued
Array ( [id] => 1396151 [patent_doc_number] => 06548883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-15 [patent_title] => 'Reduced RC between adjacent substrate wiring lines' [patent_app_type] => B2 [patent_app_number] => 10/156515 [patent_app_country] => US [patent_app_date] => 2002-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3800 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/548/06548883.pdf [firstpage_image] =>[orig_patent_app_number] => 10156515 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/156515
Reduced RC between adjacent substrate wiring lines May 27, 2002 Issued
Array ( [id] => 6535650 [patent_doc_number] => 20020163030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-07 [patent_title] => 'Floating gate memory device using composite molecular material' [patent_app_type] => new [patent_app_number] => 10/139331 [patent_app_country] => US [patent_app_date] => 2002-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3199 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20020163030.pdf [firstpage_image] =>[orig_patent_app_number] => 10139331 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/139331
Floating gate memory device using composite molecular material May 6, 2002 Issued
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