Search

Allan R. Wilson

Examiner (ID: 12196, Phone: (571)272-1738 , Office: P/2897 )

Most Active Art Unit
2897
Art Unit(s)
2897, 2503, 3621, 2815
Total Applications
1911
Issued Applications
1758
Pending Applications
18
Abandoned Applications
144

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1576368 [patent_doc_number] => 06469367 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-10-22 [patent_title] => 'Bipolar transistor' [patent_app_type] => B2 [patent_app_number] => 09/983143 [patent_app_country] => US [patent_app_date] => 2001-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 27 [patent_no_of_words] => 6574 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/469/06469367.pdf [firstpage_image] =>[orig_patent_app_number] => 09983143 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/983143
Bipolar transistor Oct 22, 2001 Issued
Array ( [id] => 6647284 [patent_doc_number] => 20030075804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'Wirebond structure and method to connect to a microelectronic die' [patent_app_type] => new [patent_app_number] => 10/032623 [patent_app_country] => US [patent_app_date] => 2001-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2698 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20030075804.pdf [firstpage_image] =>[orig_patent_app_number] => 10032623 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/032623
Wirebond structure and method to connect to a microelectronic die Oct 17, 2001 Issued
Array ( [id] => 1288655 [patent_doc_number] => 06639298 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-28 [patent_title] => 'Multi-layer inductor formed in a semiconductor substrate' [patent_app_type] => B2 [patent_app_number] => 09/972482 [patent_app_country] => US [patent_app_date] => 2001-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 4075 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/639/06639298.pdf [firstpage_image] =>[orig_patent_app_number] => 09972482 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/972482
Multi-layer inductor formed in a semiconductor substrate Oct 4, 2001 Issued
Array ( [id] => 1352216 [patent_doc_number] => 06583482 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-24 [patent_title] => 'Hetero-interface avalance photodetector' [patent_app_type] => B2 [patent_app_number] => 09/971316 [patent_app_country] => US [patent_app_date] => 2001-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 5867 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/583/06583482.pdf [firstpage_image] =>[orig_patent_app_number] => 09971316 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/971316
Hetero-interface avalance photodetector Oct 2, 2001 Issued
Array ( [id] => 6781124 [patent_doc_number] => 20030062571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Low noise microwave transistor based on low carrier velocity dispersion control' [patent_app_type] => new [patent_app_number] => 09/971271 [patent_app_country] => US [patent_app_date] => 2001-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1773 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20030062571.pdf [firstpage_image] =>[orig_patent_app_number] => 09971271 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/971271
Low noise microwave transistor based on low carrier velocity dispersion control Oct 2, 2001 Abandoned
Array ( [id] => 1522272 [patent_doc_number] => 06414365 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-02 [patent_title] => 'Thin-layer silicon-on-insulator (SOI) high-voltage device structure' [patent_app_type] => B1 [patent_app_number] => 09/968121 [patent_app_country] => US [patent_app_date] => 2001-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3483 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/414/06414365.pdf [firstpage_image] =>[orig_patent_app_number] => 09968121 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/968121
Thin-layer silicon-on-insulator (SOI) high-voltage device structure Sep 30, 2001 Issued
Array ( [id] => 5798623 [patent_doc_number] => 20020008319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-24 [patent_title] => 'Commonly housed diverse semiconductor' [patent_app_type] => new [patent_app_number] => 09/966092 [patent_app_country] => US [patent_app_date] => 2001-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2248 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20020008319.pdf [firstpage_image] =>[orig_patent_app_number] => 09966092 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/966092
Commonly housed diverse semiconductor Sep 30, 2001 Issued
Array ( [id] => 1310024 [patent_doc_number] => 06617651 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-09 [patent_title] => 'Semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 09/964851 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 38 [patent_no_of_words] => 9979 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/617/06617651.pdf [firstpage_image] =>[orig_patent_app_number] => 09964851 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/964851
Semiconductor memory device Sep 27, 2001 Issued
Array ( [id] => 1505432 [patent_doc_number] => 06465859 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'CMOS-type solid state imaging device that prevents charge inflow into optical black' [patent_app_type] => B1 [patent_app_number] => 09/963410 [patent_app_country] => US [patent_app_date] => 2001-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 4304 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/465/06465859.pdf [firstpage_image] =>[orig_patent_app_number] => 09963410 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/963410
CMOS-type solid state imaging device that prevents charge inflow into optical black Sep 26, 2001 Issued
Array ( [id] => 6616170 [patent_doc_number] => 20030210103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-13 [patent_title] => 'Multi-level conductive lines with reduced pitch' [patent_app_type] => new [patent_app_number] => 09/964205 [patent_app_country] => US [patent_app_date] => 2001-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 2135 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20030210103.pdf [firstpage_image] =>[orig_patent_app_number] => 09964205 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/964205
Multi-level conductive lines with reduced pitch Sep 25, 2001 Issued
Array ( [id] => 1428224 [patent_doc_number] => 06504221 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'Magneto-resistive device including soft reference layer having embedded conductors' [patent_app_type] => B1 [patent_app_number] => 09/963932 [patent_app_country] => US [patent_app_date] => 2001-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 32 [patent_no_of_words] => 6071 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/504/06504221.pdf [firstpage_image] =>[orig_patent_app_number] => 09963932 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/963932
Magneto-resistive device including soft reference layer having embedded conductors Sep 24, 2001 Issued
Array ( [id] => 1314492 [patent_doc_number] => 06614106 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-02 [patent_title] => 'Stacked circuit device and method for evaluating an integrated circuit substrate using the stacked circuit device' [patent_app_type] => B2 [patent_app_number] => 09/957510 [patent_app_country] => US [patent_app_date] => 2001-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2270 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/614/06614106.pdf [firstpage_image] =>[orig_patent_app_number] => 09957510 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/957510
Stacked circuit device and method for evaluating an integrated circuit substrate using the stacked circuit device Sep 20, 2001 Issued
Array ( [id] => 1491841 [patent_doc_number] => 06417553 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-09 [patent_title] => 'Semiconductor wafer with sensors for detecting radiation on the semiconductor wafer' [patent_app_type] => B1 [patent_app_number] => 09/682482 [patent_app_country] => US [patent_app_date] => 2001-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2668 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/417/06417553.pdf [firstpage_image] =>[orig_patent_app_number] => 09682482 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/682482
Semiconductor wafer with sensors for detecting radiation on the semiconductor wafer Sep 6, 2001 Issued
Array ( [id] => 1403666 [patent_doc_number] => 06541826 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-01 [patent_title] => 'Field effect semiconductor device and its production method' [patent_app_type] => B2 [patent_app_number] => 09/934652 [patent_app_country] => US [patent_app_date] => 2001-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 26 [patent_no_of_words] => 6111 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/541/06541826.pdf [firstpage_image] =>[orig_patent_app_number] => 09934652 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/934652
Field effect semiconductor device and its production method Aug 22, 2001 Issued
Array ( [id] => 1420493 [patent_doc_number] => 06512270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-01-28 [patent_title] => 'Thin film transistor substrate and process for producing the same' [patent_app_type] => B2 [patent_app_number] => 09/931761 [patent_app_country] => US [patent_app_date] => 2001-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4839 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/512/06512270.pdf [firstpage_image] =>[orig_patent_app_number] => 09931761 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/931761
Thin film transistor substrate and process for producing the same Aug 19, 2001 Issued
Array ( [id] => 1452389 [patent_doc_number] => 06455942 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-24 [patent_title] => 'Method and apparatus for strapping a plurality of polysilicon lines in a semiconductor integrated circuit device' [patent_app_type] => B1 [patent_app_number] => 09/930811 [patent_app_country] => US [patent_app_date] => 2001-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2141 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/455/06455942.pdf [firstpage_image] =>[orig_patent_app_number] => 09930811 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/930811
Method and apparatus for strapping a plurality of polysilicon lines in a semiconductor integrated circuit device Aug 14, 2001 Issued
Array ( [id] => 6837215 [patent_doc_number] => 20030034555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'Mold' [patent_app_type] => new [patent_app_number] => 09/930506 [patent_app_country] => US [patent_app_date] => 2001-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3317 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20030034555.pdf [firstpage_image] =>[orig_patent_app_number] => 09930506 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/930506
Mold for a semiconductor chip Aug 14, 2001 Issued
Array ( [id] => 1590705 [patent_doc_number] => 06483129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-11-19 [patent_title] => 'Retrograde well structure for a CMOS imager' [patent_app_type] => B2 [patent_app_number] => 09/918450 [patent_app_country] => US [patent_app_date] => 2001-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5796 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/483/06483129.pdf [firstpage_image] =>[orig_patent_app_number] => 09918450 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/918450
Retrograde well structure for a CMOS imager Jul 31, 2001 Issued
Array ( [id] => 1150043 [patent_doc_number] => 06774442 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-10 [patent_title] => 'Semiconductor device and CMOS transistor' [patent_app_type] => B2 [patent_app_number] => 09/908618 [patent_app_country] => US [patent_app_date] => 2001-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 26 [patent_no_of_words] => 8541 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/774/06774442.pdf [firstpage_image] =>[orig_patent_app_number] => 09908618 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/908618
Semiconductor device and CMOS transistor Jul 19, 2001 Issued
Array ( [id] => 6028695 [patent_doc_number] => 20020017667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-14 [patent_title] => 'Ferroelectric memory and method of fabricating the same' [patent_app_type] => new [patent_app_number] => 09/892872 [patent_app_country] => US [patent_app_date] => 2001-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8678 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20020017667.pdf [firstpage_image] =>[orig_patent_app_number] => 09892872 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/892872
Ferroelectric memory and method of fabricating the same Jun 27, 2001 Abandoned
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