
Allan R. Wilson
Examiner (ID: 12196, Phone: (571)272-1738 , Office: P/2897 )
| Most Active Art Unit | 2897 |
| Art Unit(s) | 2897, 2503, 3621, 2815 |
| Total Applications | 1911 |
| Issued Applications | 1758 |
| Pending Applications | 18 |
| Abandoned Applications | 144 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1132422
[patent_doc_number] => 06787861
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-09-07
[patent_title] => 'Non-crystalline oxides for use in microelectronic, optical, and other applications'
[patent_app_type] => B2
[patent_app_number] => 09/891552
[patent_app_country] => US
[patent_app_date] => 2001-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 4565
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/787/06787861.pdf
[firstpage_image] =>[orig_patent_app_number] => 09891552
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/891552 | Non-crystalline oxides for use in microelectronic, optical, and other applications | Jun 24, 2001 | Issued |
Array
(
[id] => 6985503
[patent_doc_number] => 20010035524
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-11-01
[patent_title] => 'Josephson junction array device, and manufacture thereof'
[patent_app_type] => new
[patent_app_number] => 09/885833
[patent_app_country] => US
[patent_app_date] => 2001-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 11990
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[pdf_file] => publications/A1/0035/20010035524.pdf
[firstpage_image] =>[orig_patent_app_number] => 09885833
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/885833 | Josephson junction array device, and manufacture thereof | Jun 19, 2001 | Abandoned |
Array
(
[id] => 217518
[patent_doc_number] => 07612430
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-11-03
[patent_title] => 'Silicon bipolar transistor, circuit arrangement and method for producing a silicon bipolar transistor'
[patent_app_type] => utility
[patent_app_number] => 10/297421
[patent_app_country] => US
[patent_app_date] => 2001-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/07/612/07612430.pdf
[firstpage_image] =>[orig_patent_app_number] => 10297421
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/297421 | Silicon bipolar transistor, circuit arrangement and method for producing a silicon bipolar transistor | Jun 14, 2001 | Issued |
| 90/006029 | ESD PROTECTION IMPROVEMENT | Jun 6, 2001 | Issued |
Array
(
[id] => 6221347
[patent_doc_number] => 20020003048
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-01-10
[patent_title] => 'Metal interconnections and active matrix substrate using the same'
[patent_app_type] => new
[patent_app_number] => 09/866121
[patent_app_country] => US
[patent_app_date] => 2001-05-25
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 09866121
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/866121 | Metal interconnections and active matrix substrate using the same | May 24, 2001 | Issued |
Array
(
[id] => 6888534
[patent_doc_number] => 20010023989
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-09-27
[patent_title] => 'Semiconductor dielectric structure and method for making the same'
[patent_app_type] => new
[patent_app_number] => 09/864441
[patent_app_country] => US
[patent_app_date] => 2001-05-23
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 09864441
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/864441 | Semiconductor dielectric structure and method for making the same | May 22, 2001 | Abandoned |
Array
(
[id] => 6285100
[patent_doc_number] => 20020053738
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-05-09
[patent_title] => 'SEMICONDUCTOR DEVICE WITH IMPROVED METAL INTERCONNECTION AND METHOD FOR FORMING THE METAL INTERCONNECTION'
[patent_app_type] => new
[patent_app_number] => 09/862521
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0053/20020053738.pdf
[firstpage_image] =>[orig_patent_app_number] => 09862521
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/862521 | Semiconductor device with improved metal interconnection and method for forming the metal interconnection | May 22, 2001 | Issued |
Array
(
[id] => 6897491
[patent_doc_number] => 20010045656
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-11-29
[patent_title] => 'Multilayer wiring structure for semiconductor device'
[patent_app_type] => new
[patent_app_number] => 09/863451
[patent_app_country] => US
[patent_app_date] => 2001-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 1815
[patent_no_of_claims] => 3
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[pdf_file] => publications/A1/0045/20010045656.pdf
[firstpage_image] =>[orig_patent_app_number] => 09863451
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/863451 | Multilayer wiring structure for semiconductor device | May 21, 2001 | Abandoned |
Array
(
[id] => 1347412
[patent_doc_number] => 06586830
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-07-01
[patent_title] => 'Semiconductor device with an interposer'
[patent_app_type] => B2
[patent_app_number] => 09/860042
[patent_app_country] => US
[patent_app_date] => 2001-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[patent_no_of_words] => 5575
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[pdf_file] => patents/06/586/06586830.pdf
[firstpage_image] =>[orig_patent_app_number] => 09860042
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/860042 | Semiconductor device with an interposer | May 16, 2001 | Issued |
Array
(
[id] => 1420620
[patent_doc_number] => 06512280
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-01-28
[patent_title] => 'Integrated CMOS structure for gate-controlled buried photodiode'
[patent_app_type] => B2
[patent_app_number] => 09/859121
[patent_app_country] => US
[patent_app_date] => 2001-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => patents/06/512/06512280.pdf
[firstpage_image] =>[orig_patent_app_number] => 09859121
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/859121 | Integrated CMOS structure for gate-controlled buried photodiode | May 15, 2001 | Issued |
Array
(
[id] => 5840445
[patent_doc_number] => 20020130422
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-19
[patent_title] => 'Semiconductor/printed circuit board assembly, and computer system'
[patent_app_type] => new
[patent_app_number] => 09/855731
[patent_app_country] => US
[patent_app_date] => 2001-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => publications/A1/0130/20020130422.pdf
[firstpage_image] =>[orig_patent_app_number] => 09855731
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/855731 | Semiconductor/printed circuit board assembly | May 14, 2001 | Issued |
Array
(
[id] => 6107213
[patent_doc_number] => 20020171147
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-11-21
[patent_title] => 'Structure of a dual damascene via'
[patent_app_type] => new
[patent_app_number] => 09/854961
[patent_app_country] => US
[patent_app_date] => 2001-05-15
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/854961 | Structure of a dual damascene via | May 14, 2001 | Abandoned |
Array
(
[id] => 1452369
[patent_doc_number] => 06455936
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-24
[patent_title] => 'Integrated circuit assembly having interposer with a compliant layer'
[patent_app_type] => B1
[patent_app_number] => 09/855231
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/855231 | Integrated circuit assembly having interposer with a compliant layer | May 13, 2001 | Issued |
Array
(
[id] => 1536539
[patent_doc_number] => 06489676
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[patent_issue_date] => 2002-12-03
[patent_title] => 'Semiconductor device having an interconnecting post formed on an interposer within a sealing resin'
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Array
(
[id] => 1452394
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[patent_issue_date] => 2002-09-24
[patent_title] => 'Bonding pad structure of semiconductor device having improved bondability'
[patent_app_type] => B1
[patent_app_number] => 09/840720
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Array
(
[id] => 6947943
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Array
(
[id] => 1476386
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[patent_issue_date] => 2002-05-14
[patent_title] => 'Semiconductor module'
[patent_app_type] => B1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/835582 | Semiconductor module | Apr 16, 2001 | Issued |
Array
(
[id] => 6921615
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/834192 | Microelectronic contacts | Apr 11, 2001 | Issued |
Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/240651 | Integrated circuit device having reduced substrate size and a method for manufacturing the same | Mar 29, 2001 | Issued |