
Allan R. Wilson
Examiner (ID: 12196, Phone: (571)272-1738 , Office: P/2897 )
| Most Active Art Unit | 2897 |
| Art Unit(s) | 2897, 2503, 3621, 2815 |
| Total Applications | 1911 |
| Issued Applications | 1758 |
| Pending Applications | 18 |
| Abandoned Applications | 144 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1519006
[patent_doc_number] => 06501159
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-12-31
[patent_title] => 'Power transistor module, power amplifier and method in the fabrication thereof'
[patent_app_type] => B2
[patent_app_number] => 09/735533
[patent_app_country] => US
[patent_app_date] => 2000-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 14
[patent_no_of_words] => 5177
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/501/06501159.pdf
[firstpage_image] =>[orig_patent_app_number] => 09735533
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/735533 | Power transistor module, power amplifier and method in the fabrication thereof | Dec 13, 2000 | Issued |
Array
(
[id] => 1459892
[patent_doc_number] => 06426537
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-07-30
[patent_title] => 'Ultra-thin piezoelectric resonator'
[patent_app_type] => B2
[patent_app_number] => 09/734681
[patent_app_country] => US
[patent_app_date] => 2000-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 6
[patent_no_of_words] => 1673
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/426/06426537.pdf
[firstpage_image] =>[orig_patent_app_number] => 09734681
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/734681 | Ultra-thin piezoelectric resonator | Dec 12, 2000 | Issued |
Array
(
[id] => 6877225
[patent_doc_number] => 20010002711
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-06-07
[patent_title] => 'Reduced area storage node junction and fabrication process'
[patent_app_type] => new-utility
[patent_app_number] => 09/738413
[patent_app_country] => US
[patent_app_date] => 2000-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3762
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0002/20010002711.pdf
[firstpage_image] =>[orig_patent_app_number] => 09738413
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/738413 | Reduced area storage node junction and fabrication process | Dec 12, 2000 | Issued |
Array
(
[id] => 1597050
[patent_doc_number] => 06384441
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-05-07
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => B1
[patent_app_number] => 09/730761
[patent_app_country] => US
[patent_app_date] => 2000-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 55
[patent_no_of_words] => 15160
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 311
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/384/06384441.pdf
[firstpage_image] =>[orig_patent_app_number] => 09730761
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/730761 | Semiconductor device and method of manufacturing the same | Dec 6, 2000 | Issued |
Array
(
[id] => 1597134
[patent_doc_number] => 06384462
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-05-07
[patent_title] => 'Planar hetero-interface photodetector'
[patent_app_type] => B1
[patent_app_number] => 09/730692
[patent_app_country] => US
[patent_app_date] => 2000-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 3688
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/384/06384462.pdf
[firstpage_image] =>[orig_patent_app_number] => 09730692
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/730692 | Planar hetero-interface photodetector | Dec 5, 2000 | Issued |
Array
(
[id] => 1452257
[patent_doc_number] => 06455909
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-24
[patent_title] => 'Image sensor'
[patent_app_type] => B1
[patent_app_number] => 09/726591
[patent_app_country] => US
[patent_app_date] => 2000-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1950
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/455/06455909.pdf
[firstpage_image] =>[orig_patent_app_number] => 09726591
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/726591 | Image sensor | Nov 30, 2000 | Issued |
Array
(
[id] => 1410377
[patent_doc_number] => 06534839
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-03-18
[patent_title] => 'Nanomechanical switches and circuits'
[patent_app_type] => B1
[patent_app_number] => 09/711001
[patent_app_country] => US
[patent_app_date] => 2000-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 47
[patent_no_of_words] => 6557
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/534/06534839.pdf
[firstpage_image] =>[orig_patent_app_number] => 09711001
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/711001 | Nanomechanical switches and circuits | Nov 8, 2000 | Issued |
Array
(
[id] => 1480896
[patent_doc_number] => 06345189
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-02-05
[patent_title] => 'Assembly of carrier and superconductive film'
[patent_app_type] => B1
[patent_app_number] => 09/695370
[patent_app_country] => US
[patent_app_date] => 2000-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 15
[patent_no_of_words] => 7076
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/345/06345189.pdf
[firstpage_image] =>[orig_patent_app_number] => 09695370
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/695370 | Assembly of carrier and superconductive film | Oct 23, 2000 | Issued |
Array
(
[id] => 1480905
[patent_doc_number] => 06345190
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-02-05
[patent_title] => 'Assembly of carrier and superconductive film'
[patent_app_type] => B1
[patent_app_number] => 09/695433
[patent_app_country] => US
[patent_app_date] => 2000-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 15
[patent_no_of_words] => 7073
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/345/06345190.pdf
[firstpage_image] =>[orig_patent_app_number] => 09695433
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/695433 | Assembly of carrier and superconductive film | Oct 23, 2000 | Issued |
Array
(
[id] => 217071
[patent_doc_number] => 07611981
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-11-03
[patent_title] => 'Optimized circuit design layout for high performance ball grid array packages'
[patent_app_type] => utility
[patent_app_number] => 09/678318
[patent_app_country] => US
[patent_app_date] => 2000-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2017
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 340
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/611/07611981.pdf
[firstpage_image] =>[orig_patent_app_number] => 09678318
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/678318 | Optimized circuit design layout for high performance ball grid array packages | Oct 2, 2000 | Issued |
Array
(
[id] => 1452252
[patent_doc_number] => 06455907
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-24
[patent_title] => 'Magnetoresistive sensor assembly and method for manufacturing same'
[patent_app_type] => B1
[patent_app_number] => 09/662061
[patent_app_country] => US
[patent_app_date] => 2000-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 11
[patent_no_of_words] => 2026
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/455/06455907.pdf
[firstpage_image] =>[orig_patent_app_number] => 09662061
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/662061 | Magnetoresistive sensor assembly and method for manufacturing same | Sep 13, 2000 | Issued |
Array
(
[id] => 4333552
[patent_doc_number] => 06320231
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-11-20
[patent_title] => 'Semiconductor device for protecting a semiconductor chip from damage due to electrostatic discharge'
[patent_app_type] => 1
[patent_app_number] => 9/649583
[patent_app_country] => US
[patent_app_date] => 2000-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 13
[patent_no_of_words] => 5063
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/320/06320231.pdf
[firstpage_image] =>[orig_patent_app_number] => 649583
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/649583 | Semiconductor device for protecting a semiconductor chip from damage due to electrostatic discharge | Aug 28, 2000 | Issued |
Array
(
[id] => 1316137
[patent_doc_number] => 06611037
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-08-26
[patent_title] => 'Multi-trench region for accumulation of photo-generated charge in a CMOS imager'
[patent_app_type] => B1
[patent_app_number] => 09/650432
[patent_app_country] => US
[patent_app_date] => 2000-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 7125
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/611/06611037.pdf
[firstpage_image] =>[orig_patent_app_number] => 09650432
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/650432 | Multi-trench region for accumulation of photo-generated charge in a CMOS imager | Aug 27, 2000 | Issued |
Array
(
[id] => 1547343
[patent_doc_number] => 06445014
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-03
[patent_title] => 'Retrograde well structure for a CMOS imager'
[patent_app_type] => B1
[patent_app_number] => 09/645582
[patent_app_country] => US
[patent_app_date] => 2000-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 7720
[patent_no_of_claims] => 81
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/445/06445014.pdf
[firstpage_image] =>[orig_patent_app_number] => 09645582
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/645582 | Retrograde well structure for a CMOS imager | Aug 24, 2000 | Issued |
Array
(
[id] => 210471
[patent_doc_number] => 07625823
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-12-01
[patent_title] => 'Method of patterning a metal layer in a semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 09/648111
[patent_app_country] => US
[patent_app_date] => 2000-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 2221
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/625/07625823.pdf
[firstpage_image] =>[orig_patent_app_number] => 09648111
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/648111 | Method of patterning a metal layer in a semiconductor device | Aug 24, 2000 | Issued |
Array
(
[id] => 4401558
[patent_doc_number] => 06297552
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-02
[patent_title] => 'Commonly housed diverse semiconductor die'
[patent_app_type] => 1
[patent_app_number] => 9/645060
[patent_app_country] => US
[patent_app_date] => 2000-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 2143
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/297/06297552.pdf
[firstpage_image] =>[orig_patent_app_number] => 645060
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/645060 | Commonly housed diverse semiconductor die | Aug 23, 2000 | Issued |
Array
(
[id] => 1480602
[patent_doc_number] => 06452252
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-09-17
[patent_title] => 'Semiconductor device'
[patent_app_type] => B1
[patent_app_number] => 09/637832
[patent_app_country] => US
[patent_app_date] => 2000-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2490
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/452/06452252.pdf
[firstpage_image] =>[orig_patent_app_number] => 09637832
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/637832 | Semiconductor device | Aug 10, 2000 | Issued |
Array
(
[id] => 1468512
[patent_doc_number] => 06459120
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-01
[patent_title] => 'Semiconductor device and manufacturing method of the same'
[patent_app_type] => B1
[patent_app_number] => 09/635691
[patent_app_country] => US
[patent_app_date] => 2000-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 14
[patent_no_of_words] => 4533
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/459/06459120.pdf
[firstpage_image] =>[orig_patent_app_number] => 09635691
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/635691 | Semiconductor device and manufacturing method of the same | Aug 9, 2000 | Issued |
Array
(
[id] => 1276898
[patent_doc_number] => 06649984
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-11-18
[patent_title] => 'Logic-merged memory'
[patent_app_type] => B1
[patent_app_number] => 09/632333
[patent_app_country] => US
[patent_app_date] => 2000-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 30
[patent_no_of_words] => 14435
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/649/06649984.pdf
[firstpage_image] =>[orig_patent_app_number] => 09632333
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/632333 | Logic-merged memory | Aug 2, 2000 | Issued |
| 09/621923 | Method of forming self-aligned stacked capacitor | Jul 23, 2000 | Abandoned |