Search

Allen Chan

Examiner (ID: 10119, Phone: (571)270-5529 , Office: P/3714 )

Most Active Art Unit
3715
Art Unit(s)
3718, 3714, 3715
Total Applications
946
Issued Applications
686
Pending Applications
53
Abandoned Applications
213

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19053096 [patent_doc_number] => 20240095065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => Multi-stage Thread Scheduling [patent_app_type] => utility [patent_app_number] => 18/054376 [patent_app_country] => US [patent_app_date] => 2022-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15948 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18054376 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/054376
Multi-stage thread scheduling Nov 9, 2022 Issued
Array ( [id] => 18422402 [patent_doc_number] => 20230176866 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => MULTIBIT SHIFT INSTRUCTION [patent_app_type] => utility [patent_app_number] => 17/982980 [patent_app_country] => US [patent_app_date] => 2022-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10203 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17982980 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/982980
MULTIBIT SHIFT INSTRUCTION Nov 7, 2022 Abandoned
Array ( [id] => 18286099 [patent_doc_number] => 20230101571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => DEVICES, METHODS, AND MEDIA FOR EFFICIENT DATA DEPENDENCY MANAGEMENT FOR IN-ORDER ISSUE PROCESSORS [patent_app_type] => utility [patent_app_number] => 18/050719 [patent_app_country] => US [patent_app_date] => 2022-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12048 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18050719 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/050719
DEVICES, METHODS, AND MEDIA FOR EFFICIENT DATA DEPENDENCY MANAGEMENT FOR IN-ORDER ISSUE PROCESSORS Oct 27, 2022 Abandoned
Array ( [id] => 19942086 [patent_doc_number] => 12314215 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-05-27 [patent_title] => Digital signal processor (DSP) with global and local interconnect architecture and reconfigurable hardware accelerator core [patent_app_type] => utility [patent_app_number] => 17/967444 [patent_app_country] => US [patent_app_date] => 2022-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 338 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17967444 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/967444
Digital signal processor (DSP) with global and local interconnect architecture and reconfigurable hardware accelerator core Oct 16, 2022 Issued
Array ( [id] => 18166750 [patent_doc_number] => 20230033355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => SYNCHRONIZING SCHEDULING TASKS WITH ATOMIC ALU [patent_app_type] => utility [patent_app_number] => 17/965161 [patent_app_country] => US [patent_app_date] => 2022-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16131 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17965161 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/965161
Synchronizing scheduling tasks with atomic ALU Oct 12, 2022 Issued
Array ( [id] => 18307451 [patent_doc_number] => 20230111351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => TOPOLOGY OF ACCELERATORS [patent_app_type] => utility [patent_app_number] => 17/964256 [patent_app_country] => US [patent_app_date] => 2022-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5719 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17964256 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/964256
Topology of accelerators Oct 11, 2022 Issued
Array ( [id] => 18802925 [patent_doc_number] => 11836082 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Neural processing device and load/store method of neural processing device [patent_app_type] => utility [patent_app_number] => 17/938024 [patent_app_country] => US [patent_app_date] => 2022-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 20814 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17938024 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/938024
Neural processing device and load/store method of neural processing device Oct 3, 2022 Issued
Array ( [id] => 19443419 [patent_doc_number] => 12093690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Look-up table read [patent_app_type] => utility [patent_app_number] => 17/952517 [patent_app_country] => US [patent_app_date] => 2022-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 40 [patent_no_of_words] => 23695 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17952517 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/952517
Look-up table read Sep 25, 2022 Issued
Array ( [id] => 19053065 [patent_doc_number] => 20240095034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => SELECTIVE CONTROL FLOW PREDICTOR INSERTION [patent_app_type] => utility [patent_app_number] => 17/949874 [patent_app_country] => US [patent_app_date] => 2022-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7174 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17949874 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/949874
Selective control flow predictor insertion Sep 20, 2022 Issued
Array ( [id] => 19045755 [patent_doc_number] => 11934870 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Method for scheduling a set of computing tasks in a supercomputer [patent_app_type] => utility [patent_app_number] => 17/943385 [patent_app_country] => US [patent_app_date] => 2022-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 5858 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17943385 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/943385
Method for scheduling a set of computing tasks in a supercomputer Sep 12, 2022 Issued
Array ( [id] => 19327934 [patent_doc_number] => 12045622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Input channel processing for triggered-instruction processing element [patent_app_type] => utility [patent_app_number] => 17/941404 [patent_app_country] => US [patent_app_date] => 2022-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 17446 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17941404 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/941404
Input channel processing for triggered-instruction processing element Sep 8, 2022 Issued
Array ( [id] => 19243732 [patent_doc_number] => 12014176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Apparatus and method for pipeline control [patent_app_type] => utility [patent_app_number] => 17/903057 [patent_app_country] => US [patent_app_date] => 2022-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7716 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17903057 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/903057
Apparatus and method for pipeline control Sep 5, 2022 Issued
Array ( [id] => 19933585 [patent_doc_number] => 12306789 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-20 [patent_title] => Performance islands for CPU clusters [patent_app_type] => utility [patent_app_number] => 17/893913 [patent_app_country] => US [patent_app_date] => 2022-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2116 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17893913 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/893913
Performance islands for CPU clusters Aug 22, 2022 Issued
Array ( [id] => 20079815 [patent_doc_number] => 12353884 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Cross-linking method and apparatus, electronic device and storage medium [patent_app_type] => utility [patent_app_number] => 18/277532 [patent_app_country] => US [patent_app_date] => 2022-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1016 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18277532 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/277532
Cross-linking method and apparatus, electronic device and storage medium Aug 16, 2022 Issued
Array ( [id] => 19942584 [patent_doc_number] => 12314716 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Computer-implemented systems and methods for serialisation of arithmetic circuits [patent_app_type] => utility [patent_app_number] => 17/887447 [patent_app_country] => US [patent_app_date] => 2022-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6275 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17887447 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/887447
Computer-implemented systems and methods for serialisation of arithmetic circuits Aug 12, 2022 Issued
Array ( [id] => 18803339 [patent_doc_number] => 11836498 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-12-05 [patent_title] => Single cycle predictor [patent_app_type] => utility [patent_app_number] => 17/879281 [patent_app_country] => US [patent_app_date] => 2022-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 23956 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17879281 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/879281
Single cycle predictor Aug 1, 2022 Issued
Array ( [id] => 18238268 [patent_doc_number] => 20230070579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => SYSTEMS AND METHODS TO SKIP INCONSEQUENTIAL MATRIX OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/878427 [patent_app_country] => US [patent_app_date] => 2022-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27210 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17878427 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/878427
Systems and methods to skip inconsequential matrix operations Jul 31, 2022 Issued
Array ( [id] => 18881279 [patent_doc_number] => 20240004648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => VECTOR UNPACK BASED ON SELECTION INFORMATION [patent_app_type] => utility [patent_app_number] => 17/856981 [patent_app_country] => US [patent_app_date] => 2022-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13700 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856981 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/856981
VECTOR UNPACK BASED ON SELECTION INFORMATION Jul 1, 2022 Pending
Array ( [id] => 19538601 [patent_doc_number] => 12131154 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-29 [patent_title] => Systems and methods for performing instructions to convert to 16-bit floating-point format [patent_app_type] => utility [patent_app_number] => 17/851468 [patent_app_country] => US [patent_app_date] => 2022-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 29 [patent_no_of_words] => 18354 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17851468 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/851468
Systems and methods for performing instructions to convert to 16-bit floating-point format Jun 27, 2022 Issued
Array ( [id] => 18864173 [patent_doc_number] => 20230418609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => CONTROL FLOW PREDICTION USING POINTERS [patent_app_type] => utility [patent_app_number] => 17/851266 [patent_app_country] => US [patent_app_date] => 2022-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8537 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17851266 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/851266
Control flow prediction using pointers Jun 27, 2022 Issued
Menu