Search

Alonzo Chambliss

Examiner (ID: 3784, Phone: (571)272-1927 , Office: P/2897 )

Most Active Art Unit
2897
Art Unit(s)
2897, 2814, 2827, 2892
Total Applications
2405
Issued Applications
2120
Pending Applications
104
Abandoned Applications
210

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17303043 [patent_doc_number] => 20210398882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => SEMICONDUCTOR PACKAGE INCLUDING UNDERMOUNTED DIE WITH EXPOSED BACKSIDE METAL [patent_app_type] => utility [patent_app_number] => 16/904193 [patent_app_country] => US [patent_app_date] => 2020-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7047 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16904193 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/904193
Semiconductor package including undermounted die with exposed backside metal Jun 16, 2020 Issued
Array ( [id] => 18343447 [patent_doc_number] => 11640931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-02 [patent_title] => Die attachment method and material between a semiconductor device and die pad of a leadframe [patent_app_type] => utility [patent_app_number] => 16/899342 [patent_app_country] => US [patent_app_date] => 2020-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2108 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16899342 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/899342
Die attachment method and material between a semiconductor device and die pad of a leadframe Jun 10, 2020 Issued
Array ( [id] => 16624879 [patent_doc_number] => 20210043532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => CHIP PACKAGE MODULE WITH HEAT DISSIPATION FUNCTION AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/897367 [patent_app_country] => US [patent_app_date] => 2020-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6993 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16897367 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/897367
Method of fabricating a chip package module with improve heat dissipation effect Jun 9, 2020 Issued
Array ( [id] => 17196281 [patent_doc_number] => 11165050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-02 [patent_title] => Organic light-emitting apparatus and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/894631 [patent_app_country] => US [patent_app_date] => 2020-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 26 [patent_no_of_words] => 8736 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16894631 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/894631
Organic light-emitting apparatus and method of manufacturing the same Jun 4, 2020 Issued
Array ( [id] => 17270357 [patent_doc_number] => 11195785 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Interposer with through electrode having a wiring protection layer [patent_app_type] => utility [patent_app_number] => 16/891443 [patent_app_country] => US [patent_app_date] => 2020-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 11637 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16891443 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/891443
Interposer with through electrode having a wiring protection layer Jun 2, 2020 Issued
Array ( [id] => 17956350 [patent_doc_number] => 11482463 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-25 [patent_title] => Vertically attaching a chip to a substrate [patent_app_type] => utility [patent_app_number] => 16/879738 [patent_app_country] => US [patent_app_date] => 2020-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 33 [patent_no_of_words] => 9777 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16879738 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/879738
Vertically attaching a chip to a substrate May 19, 2020 Issued
Array ( [id] => 16286200 [patent_doc_number] => 20200279802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-03 [patent_title] => Plurality of Different Size Metal Layers for a Pad Structure [patent_app_type] => utility [patent_app_number] => 16/876238 [patent_app_country] => US [patent_app_date] => 2020-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7893 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16876238 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/876238
Plurality of different size metal layers for a pad structure May 17, 2020 Issued
Array ( [id] => 18465542 [patent_doc_number] => 11689848 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => Capacitive sensor assembly and electrical circuit therefor [patent_app_type] => utility [patent_app_number] => 16/874503 [patent_app_country] => US [patent_app_date] => 2020-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3890 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16874503 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/874503
Capacitive sensor assembly and electrical circuit therefor May 13, 2020 Issued
Array ( [id] => 17758232 [patent_doc_number] => 11398531 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-26 [patent_title] => Plurality of light conversion layers between first and second substrates [patent_app_type] => utility [patent_app_number] => 16/867535 [patent_app_country] => US [patent_app_date] => 2020-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6432 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16867535 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/867535
Plurality of light conversion layers between first and second substrates May 4, 2020 Issued
Array ( [id] => 17366160 [patent_doc_number] => 11233193 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-25 [patent_title] => Method of manufacturing a magnetorestive random access memeory (MRAM) [patent_app_type] => utility [patent_app_number] => 16/862598 [patent_app_country] => US [patent_app_date] => 2020-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 5073 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16862598 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/862598
Method of manufacturing a magnetorestive random access memeory (MRAM) Apr 29, 2020 Issued
Array ( [id] => 19229641 [patent_doc_number] => 12009285 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-11 [patent_title] => Substrate having a recessed portion for an electronic component [patent_app_type] => utility [patent_app_number] => 17/604779 [patent_app_country] => US [patent_app_date] => 2020-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 7649 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17604779 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/604779
Substrate having a recessed portion for an electronic component Apr 21, 2020 Issued
Array ( [id] => 17772399 [patent_doc_number] => 11404351 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-02 [patent_title] => Chip-on-chip power card with embedded direct liquid cooling [patent_app_type] => utility [patent_app_number] => 16/854797 [patent_app_country] => US [patent_app_date] => 2020-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 32 [patent_no_of_words] => 14572 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16854797 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/854797
Chip-on-chip power card with embedded direct liquid cooling Apr 20, 2020 Issued
Array ( [id] => 18235994 [patent_doc_number] => 11600558 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Plurality of transistor packages with exposed source and drain contacts mounted on a carrier [patent_app_type] => utility [patent_app_number] => 16/845304 [patent_app_country] => US [patent_app_date] => 2020-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 16858 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16845304 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/845304
Plurality of transistor packages with exposed source and drain contacts mounted on a carrier Apr 9, 2020 Issued
Array ( [id] => 19048356 [patent_doc_number] => 11937489 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Water absorption layer mounted on light emitting layer for array substrate [patent_app_type] => utility [patent_app_number] => 16/959108 [patent_app_country] => US [patent_app_date] => 2020-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4405 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16959108 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/959108
Water absorption layer mounted on light emitting layer for array substrate Apr 9, 2020 Issued
Array ( [id] => 16936467 [patent_doc_number] => 20210202356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => LEADFRAME ASSEMBLY [patent_app_type] => utility [patent_app_number] => 16/839216 [patent_app_country] => US [patent_app_date] => 2020-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2454 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16839216 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/839216
Cutting a leadframe assembly with a plurality of punching tools Apr 2, 2020 Issued
Array ( [id] => 18047975 [patent_doc_number] => 11521933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Current flow between a plurality of semiconductor chips [patent_app_type] => utility [patent_app_number] => 16/835238 [patent_app_country] => US [patent_app_date] => 2020-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 18022 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16835238 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/835238
Current flow between a plurality of semiconductor chips Mar 29, 2020 Issued
Array ( [id] => 16180400 [patent_doc_number] => 20200227369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => STRUCTURES FOR BONDING A GROUP III-V DEVICE TO A SUBSTRATE BY STACKED CONDUCTIVE BUMPS [patent_app_type] => utility [patent_app_number] => 16/829267 [patent_app_country] => US [patent_app_date] => 2020-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14098 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16829267 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/829267
Structures for bonding a group III-V device to a substrate by stacked conductive bumps Mar 24, 2020 Issued
Array ( [id] => 17901223 [patent_doc_number] => 20220310885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => ENCAPSULATED FLUORESCENT ADHESIVE LAYER, METHOD FOR MANUFACTURING THEREOF, AND QUANTUM DOT BACKLIGHT [patent_app_type] => utility [patent_app_number] => 16/757390 [patent_app_country] => US [patent_app_date] => 2020-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2374 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16757390 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/757390
Encapsulated fluorescent adhesive layer having a quantum dot material Mar 23, 2020 Issued
Array ( [id] => 17284269 [patent_doc_number] => 11201315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Electro-optical device with a luminance adjustment layer [patent_app_type] => utility [patent_app_number] => 16/823666 [patent_app_country] => US [patent_app_date] => 2020-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 14445 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16823666 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/823666
Electro-optical device with a luminance adjustment layer Mar 18, 2020 Issued
Array ( [id] => 16348167 [patent_doc_number] => 20200312818 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME [patent_app_type] => utility [patent_app_number] => 16/823402 [patent_app_country] => US [patent_app_date] => 2020-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16823402 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/823402
Semiconductor device having chips attached to support members through silver sintered bodies with particles Mar 18, 2020 Issued
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