Search

Alvin H. Tan

Examiner (ID: 16831, Phone: (571)272-8595 , Office: P/2172 )

Most Active Art Unit
2172
Art Unit(s)
2144, 2118, 2178, 2173, 2172
Total Applications
694
Issued Applications
341
Pending Applications
87
Abandoned Applications
276

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8037075 [patent_doc_number] => 20120068276 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'MICROSTRUCTURE WITH AN ENHANCED ANCHOR' [patent_app_type] => utility [patent_app_number] => 12/887320 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4534 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20120068276.pdf [firstpage_image] =>[orig_patent_app_number] => 12887320 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887320
Microstructure with an enhanced anchor Sep 20, 2010 Issued
Array ( [id] => 8037215 [patent_doc_number] => 20120068344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'INTERCONNECT STRUCTURE WITH A PLANAR INTERFACE BETWEEN A SELECTIVE CONDUCTIVE CAP AND A DIELECTRIC CAP LAYER' [patent_app_type] => utility [patent_app_number] => 12/887010 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4169 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20120068344.pdf [firstpage_image] =>[orig_patent_app_number] => 12887010 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887010
Interconnect structure with a planar interface between a selective conductive cap and a dielectric cap layer Sep 20, 2010 Issued
Array ( [id] => 10850922 [patent_doc_number] => 08877601 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-04 [patent_title] => 'Lateral capacitor and method of making' [patent_app_type] => utility [patent_app_number] => 12/886859 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 4518 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12886859 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/886859
Lateral capacitor and method of making Sep 20, 2010 Issued
Array ( [id] => 8037005 [patent_doc_number] => 20120068240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'Semiconductor Device and Method using a Sacrificial Layer' [patent_app_type] => utility [patent_app_number] => 12/884900 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3704 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20120068240.pdf [firstpage_image] =>[orig_patent_app_number] => 12884900 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/884900
Semiconductor device and method using a sacrificial layer Sep 16, 2010 Issued
Array ( [id] => 8932590 [patent_doc_number] => 08492289 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-23 [patent_title] => 'Barrier layer formation for metal interconnects through enhanced impurity diffusion' [patent_app_type] => utility [patent_app_number] => 12/882500 [patent_app_country] => US [patent_app_date] => 2010-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3073 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12882500 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/882500
Barrier layer formation for metal interconnects through enhanced impurity diffusion Sep 14, 2010 Issued
Array ( [id] => 6199666 [patent_doc_number] => 20110062452 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-17 [patent_title] => 'METHOD FOR PRODUCING ZINC OXIDE-BASED SEMICONDUCTOR LIGHT-EMITTING DEVICE AND ZINC OXIDE-BASED SEMICONDUCTOR LIGHT-EMITTING DEVICE' [patent_app_type] => utility [patent_app_number] => 12/882430 [patent_app_country] => US [patent_app_date] => 2010-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8186 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20110062452.pdf [firstpage_image] =>[orig_patent_app_number] => 12882430 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/882430
Method for producing zinc oxide-based semiconductor light-emitting device and zinc oxide-based semiconductor light-emitting device Sep 14, 2010 Issued
Array ( [id] => 7815216 [patent_doc_number] => 20120061836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'SPRAY PYROLYSIS OF Y-DOPED ZnO' [patent_app_type] => utility [patent_app_number] => 12/883170 [patent_app_country] => US [patent_app_date] => 2010-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6632 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20120061836.pdf [firstpage_image] =>[orig_patent_app_number] => 12883170 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/883170
SPRAY PYROLYSIS OF Y-DOPED ZnO Sep 14, 2010 Abandoned
Array ( [id] => 8577606 [patent_doc_number] => 08343816 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-01 [patent_title] => 'Organic transistor, manufacturing method of semiconductor device and organic transistor' [patent_app_type] => utility [patent_app_number] => 12/850652 [patent_app_country] => US [patent_app_date] => 2010-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 8995 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12850652 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/850652
Organic transistor, manufacturing method of semiconductor device and organic transistor Aug 4, 2010 Issued
Array ( [id] => 7577380 [patent_doc_number] => 20110291262 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'Strength of Micro-Bump Joints' [patent_app_type] => utility [patent_app_number] => 12/789696 [patent_app_country] => US [patent_app_date] => 2010-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3117 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0291/20110291262.pdf [firstpage_image] =>[orig_patent_app_number] => 12789696 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/789696
Strength of micro-bump joints May 27, 2010 Issued
Array ( [id] => 7564948 [patent_doc_number] => 20110285011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'CU PILLAR BUMP WITH L-SHAPED NON-METAL SIDEWALL PROTECTION STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/781987 [patent_app_country] => US [patent_app_date] => 2010-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4672 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20110285011.pdf [firstpage_image] =>[orig_patent_app_number] => 12781987 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/781987
Cu pillar bump with L-shaped non-metal sidewall protection structure May 17, 2010 Issued
Array ( [id] => 6208329 [patent_doc_number] => 20110133257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-09 [patent_title] => 'TRANSFERRED THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/782303 [patent_app_country] => US [patent_app_date] => 2010-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 3835 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20110133257.pdf [firstpage_image] =>[orig_patent_app_number] => 12782303 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/782303
Transferred thin film transistor and method for manufacturing the same May 17, 2010 Issued
Array ( [id] => 7584177 [patent_doc_number] => 20110278687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-17 [patent_title] => 'BACKSIDE-ILLUMINATED SENSOR WITH NOISE REDUCTION' [patent_app_type] => utility [patent_app_number] => 12/781785 [patent_app_country] => US [patent_app_date] => 2010-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1921 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20110278687.pdf [firstpage_image] =>[orig_patent_app_number] => 12781785 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/781785
BACKSIDE-ILLUMINATED SENSOR WITH NOISE REDUCTION May 16, 2010 Abandoned
Array ( [id] => 8555061 [patent_doc_number] => 08329533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-11 [patent_title] => 'Stacked capacitor for double-poly flash memory' [patent_app_type] => utility [patent_app_number] => 12/781720 [patent_app_country] => US [patent_app_date] => 2010-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2135 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12781720 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/781720
Stacked capacitor for double-poly flash memory May 16, 2010 Issued
Array ( [id] => 7584187 [patent_doc_number] => 20110278697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-17 [patent_title] => 'METAL-INSULATOR-METAL CAPACITOR AND METHOD FOR FABRICATING METAL-INSULATOR-METAL CAPACITOR STRUCTURES' [patent_app_type] => utility [patent_app_number] => 12/781528 [patent_app_country] => US [patent_app_date] => 2010-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2645 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20110278697.pdf [firstpage_image] =>[orig_patent_app_number] => 12781528 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/781528
METAL-INSULATOR-METAL CAPACITOR AND METHOD FOR FABRICATING METAL-INSULATOR-METAL CAPACITOR STRUCTURES May 16, 2010 Abandoned
Array ( [id] => 6556962 [patent_doc_number] => 20100289107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-18 [patent_title] => 'PHOTODIODE WITH INTERFACIAL CHARGE CONTROL BY IMPLANTATION AND ASSOCIATED PROCESS' [patent_app_type] => utility [patent_app_number] => 12/780488 [patent_app_country] => US [patent_app_date] => 2010-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1404 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20100289107.pdf [firstpage_image] =>[orig_patent_app_number] => 12780488 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/780488
PHOTODIODE WITH INTERFACIAL CHARGE CONTROL BY IMPLANTATION AND ASSOCIATED PROCESS May 13, 2010 Abandoned
Array ( [id] => 8689882 [patent_doc_number] => 08389409 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-05 [patent_title] => 'Method for producing a semiconductor wafer' [patent_app_type] => utility [patent_app_number] => 12/778198 [patent_app_country] => US [patent_app_date] => 2010-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4918 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12778198 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/778198
Method for producing a semiconductor wafer May 11, 2010 Issued
Array ( [id] => 6508677 [patent_doc_number] => 20100216307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'SIMPLIFIED PITCH DOUBLING PROCESS FLOW' [patent_app_type] => utility [patent_app_number] => 12/771951 [patent_app_country] => US [patent_app_date] => 2010-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 5926 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20100216307.pdf [firstpage_image] =>[orig_patent_app_number] => 12771951 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/771951
Simplified pitch doubling process flow Apr 29, 2010 Issued
Array ( [id] => 7496697 [patent_doc_number] => 20110260137 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-27 [patent_title] => 'PROCESS FOR MAKING CONTAINED LAYERS AND DEVICES MADE WITH SAME' [patent_app_type] => utility [patent_app_number] => 12/764490 [patent_app_country] => US [patent_app_date] => 2010-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 7116 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0260/20110260137.pdf [firstpage_image] =>[orig_patent_app_number] => 12764490 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/764490
PROCESS FOR MAKING CONTAINED LAYERS AND DEVICES MADE WITH SAME Apr 20, 2010 Abandoned
Array ( [id] => 4624247 [patent_doc_number] => 08003543 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-23 [patent_title] => 'Method of forming a hard mask and method of forming a fine pattern of semiconductor device using the same' [patent_app_type] => utility [patent_app_number] => 12/759771 [patent_app_country] => US [patent_app_date] => 2010-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 29 [patent_no_of_words] => 6995 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/003/08003543.pdf [firstpage_image] =>[orig_patent_app_number] => 12759771 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/759771
Method of forming a hard mask and method of forming a fine pattern of semiconductor device using the same Apr 13, 2010 Issued
Array ( [id] => 9167149 [patent_doc_number] => 08592830 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-26 [patent_title] => 'LED unit' [patent_app_type] => utility [patent_app_number] => 13/264188 [patent_app_country] => US [patent_app_date] => 2010-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 11667 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 352 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13264188 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/264188
LED unit Apr 12, 2010 Issued
Menu