Search

Alvin H. Tan

Examiner (ID: 16831, Phone: (571)272-8595 , Office: P/2172 )

Most Active Art Unit
2172
Art Unit(s)
2144, 2118, 2178, 2173, 2172
Total Applications
694
Issued Applications
341
Pending Applications
87
Abandoned Applications
276

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6161387 [patent_doc_number] => 20110193211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'Surface Preparation of Die for Improved Bonding Strength' [patent_app_type] => utility [patent_app_number] => 12/701201 [patent_app_country] => US [patent_app_date] => 2010-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4217 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20110193211.pdf [firstpage_image] =>[orig_patent_app_number] => 12701201 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/701201
Surface Preparation of Die for Improved Bonding Strength Feb 4, 2010 Abandoned
Array ( [id] => 6311160 [patent_doc_number] => 20100193862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-05 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/700908 [patent_app_country] => US [patent_app_date] => 2010-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3284 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20100193862.pdf [firstpage_image] =>[orig_patent_app_number] => 12700908 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/700908
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Feb 4, 2010 Abandoned
Array ( [id] => 6495037 [patent_doc_number] => 20100200982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-12 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/701018 [patent_app_country] => US [patent_app_date] => 2010-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5780 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20100200982.pdf [firstpage_image] =>[orig_patent_app_number] => 12701018 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/701018
Semiconductor device and manufacturing method thereof Feb 4, 2010 Issued
Array ( [id] => 6161364 [patent_doc_number] => 20110193202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'METHODS TO ACHIEVE 22 NANOMETER AND BEYOND WITH SINGLE EXPOSURE' [patent_app_type] => utility [patent_app_number] => 12/701104 [patent_app_country] => US [patent_app_date] => 2010-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3514 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20110193202.pdf [firstpage_image] =>[orig_patent_app_number] => 12701104 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/701104
METHODS TO ACHIEVE 22 NANOMETER AND BEYOND WITH SINGLE EXPOSURE Feb 4, 2010 Abandoned
Array ( [id] => 6383162 [patent_doc_number] => 20100176412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-15 [patent_title] => 'ORGANIC EL DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/683603 [patent_app_country] => US [patent_app_date] => 2010-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11600 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20100176412.pdf [firstpage_image] =>[orig_patent_app_number] => 12683603 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/683603
ORGANIC EL DEVICE AND METHOD OF MANUFACTURING THE SAME Jan 6, 2010 Abandoned
Array ( [id] => 6422678 [patent_doc_number] => 20100102384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-29 [patent_title] => 'METAL OXIDE SEMICONDUCTOR (MOS) TRANSISTORS HAVING A RECESSED GATE ELECTRODE' [patent_app_type] => utility [patent_app_number] => 12/683089 [patent_app_country] => US [patent_app_date] => 2010-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6017 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20100102384.pdf [firstpage_image] =>[orig_patent_app_number] => 12683089 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/683089
Metal oxide semiconductor (MOS) transistors having a recessed gate electrode Jan 5, 2010 Issued
Array ( [id] => 9127057 [patent_doc_number] => 08575006 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-05 [patent_title] => 'Process to form semiconductor packages with external leads' [patent_app_type] => utility [patent_app_number] => 12/592596 [patent_app_country] => US [patent_app_date] => 2009-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 4099 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12592596 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/592596
Process to form semiconductor packages with external leads Nov 29, 2009 Issued
Array ( [id] => 6583437 [patent_doc_number] => 20100129988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-27 [patent_title] => 'DICING DIE-BONDING FILM AND PROCESS FOR PRODUCING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/625735 [patent_app_country] => US [patent_app_date] => 2009-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 16239 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20100129988.pdf [firstpage_image] =>[orig_patent_app_number] => 12625735 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/625735
DICING DIE-BONDING FILM AND PROCESS FOR PRODUCING SEMICONDUCTOR DEVICE Nov 24, 2009 Abandoned
Array ( [id] => 6185441 [patent_doc_number] => 20110124187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'VAPOR PHASE DEPOSITION PROCESSES FOR DOPING SILICON' [patent_app_type] => utility [patent_app_number] => 12/625835 [patent_app_country] => US [patent_app_date] => 2009-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2321 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0124/20110124187.pdf [firstpage_image] =>[orig_patent_app_number] => 12625835 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/625835
Vapor phase deposition processes for doping silicon Nov 24, 2009 Issued
Array ( [id] => 9608072 [patent_doc_number] => 08785237 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-22 [patent_title] => 'Method of forming variable resistance memory device' [patent_app_type] => utility [patent_app_number] => 12/625816 [patent_app_country] => US [patent_app_date] => 2009-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 4735 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12625816 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/625816
Method of forming variable resistance memory device Nov 24, 2009 Issued
Array ( [id] => 6540579 [patent_doc_number] => 20100221889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-02 [patent_title] => 'Method of manufacturing semiconductor device having capacitor under bit line structure' [patent_app_type] => utility [patent_app_number] => 12/592396 [patent_app_country] => US [patent_app_date] => 2009-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4131 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20100221889.pdf [firstpage_image] =>[orig_patent_app_number] => 12592396 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/592396
Method of manufacturing semiconductor device having capacitor under bit line structure Nov 23, 2009 Issued
Array ( [id] => 8577610 [patent_doc_number] => 08343820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-01 [patent_title] => 'Method for fabricating vertical channel type non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 12/624966 [patent_app_country] => US [patent_app_date] => 2009-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6371 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12624966 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/624966
Method for fabricating vertical channel type non-volatile memory device Nov 23, 2009 Issued
Array ( [id] => 6247523 [patent_doc_number] => 20100136724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-03 [patent_title] => 'METHOD FOR FABRICATING A NANOSTRUCTURED SUBSTRATE FOR OLED AND METHOD FOR FABRICATING AN OLED' [patent_app_type] => utility [patent_app_number] => 12/624616 [patent_app_country] => US [patent_app_date] => 2009-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8104 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0136/20100136724.pdf [firstpage_image] =>[orig_patent_app_number] => 12624616 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/624616
Method for fabricating a nanostructured substrate for OLED and method for fabricating an OLED Nov 23, 2009 Issued
Array ( [id] => 6582897 [patent_doc_number] => 20100129949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-27 [patent_title] => 'INCREASING SOLAR CELL EFFICIENCY WITH SILVER NANOWIRES' [patent_app_type] => utility [patent_app_number] => 12/624736 [patent_app_country] => US [patent_app_date] => 2009-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2306 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20100129949.pdf [firstpage_image] =>[orig_patent_app_number] => 12624736 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/624736
INCREASING SOLAR CELL EFFICIENCY WITH SILVER NANOWIRES Nov 23, 2009 Abandoned
Array ( [id] => 6583105 [patent_doc_number] => 20100129967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-27 [patent_title] => 'METHOD FOR FABRICATING THIN FILM TRANSISTORS AND ARRAY SUBSTRATE INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/622276 [patent_app_country] => US [patent_app_date] => 2009-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2420 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20100129967.pdf [firstpage_image] =>[orig_patent_app_number] => 12622276 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/622276
Method for fabricating thin film transistors and array substrate including the same Nov 18, 2009 Issued
Array ( [id] => 6001873 [patent_doc_number] => 20110117712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-19 [patent_title] => 'SEMICONDUCTOR DEVICE WITH HIGH K DIELECTRIC CONTROL TERMINAL SPACER STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/622115 [patent_app_country] => US [patent_app_date] => 2009-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3748 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20110117712.pdf [firstpage_image] =>[orig_patent_app_number] => 12622115 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/622115
Semiconductor device with high K dielectric control terminal spacer structure Nov 18, 2009 Issued
Array ( [id] => 5932528 [patent_doc_number] => 20110210435 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => 'MEMS DEVICES' [patent_app_type] => utility [patent_app_number] => 13/128202 [patent_app_country] => US [patent_app_date] => 2009-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2214 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20110210435.pdf [firstpage_image] =>[orig_patent_app_number] => 13128202 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/128202
MEMS devices Nov 9, 2009 Issued
Array ( [id] => 13658 [patent_doc_number] => 07803684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-28 [patent_title] => 'Method of fabricating semiconductor device having a junction extended by a selective epitaxial growth (SEG) layer' [patent_app_type] => utility [patent_app_number] => 12/585588 [patent_app_country] => US [patent_app_date] => 2009-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 38 [patent_no_of_words] => 5945 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/803/07803684.pdf [firstpage_image] =>[orig_patent_app_number] => 12585588 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/585588
Method of fabricating semiconductor device having a junction extended by a selective epitaxial growth (SEG) layer Sep 17, 2009 Issued
Array ( [id] => 6463216 [patent_doc_number] => 20100006884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-14 [patent_title] => 'Light Emitting Device and Manufacturing Method Therof' [patent_app_type] => utility [patent_app_number] => 12/585420 [patent_app_country] => US [patent_app_date] => 2009-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2990 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20100006884.pdf [firstpage_image] =>[orig_patent_app_number] => 12585420 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/585420
Light Emitting Device and Manufacturing Method Therof Sep 14, 2009 Abandoned
Array ( [id] => 10832022 [patent_doc_number] => 08860195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-14 [patent_title] => 'Apparatus and method for increasing the quantity of discrete electronic components in an integrated circuit package' [patent_app_type] => utility [patent_app_number] => 12/534819 [patent_app_country] => US [patent_app_date] => 2009-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 2644 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12534819 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/534819
Apparatus and method for increasing the quantity of discrete electronic components in an integrated circuit package Aug 2, 2009 Issued
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