Alyssa H. Bowler

Array ( [id] => 2815557 [patent_doc_number] => 05148396 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-15 [patent_title] => 'Semiconductor integrated circuit memory enabling memory write masking' [patent_app_type] => 1 [patent_app_number] => 7/485693 [patent_app_country] => US [patent_app_date] => 1990-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5005 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/148/05148396.pdf [firstpage_image] =>[orig_patent_app_number] => 485693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2598677 [patent_doc_number] => 04970693 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-13 [patent_title] => 'Semiconductor memory device with internal control signal based upon output timing' [patent_app_type] => 1 [patent_app_number] => 7/484474 [patent_app_country] => US [patent_app_date] => 1990-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3332 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 323 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/970/04970693.pdf [firstpage_image] =>[orig_patent_app_number] => 484474 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2905239 [patent_doc_number] => 05184320 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-02 [patent_title] => 'Cached random access memory device and system' [patent_app_type] => 1 [patent_app_number] => 7/484446 [patent_app_country] => US [patent_app_date] => 1990-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3157 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/184/05184320.pdf [firstpage_image] =>[orig_patent_app_number] => 484446 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2867638 [patent_doc_number] => 05113514 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-12 [patent_title] => 'System bus for multiprocessor computer system' [patent_app_type] => 1 [patent_app_number] => 7/482288 [patent_app_country] => US [patent_app_date] => 1990-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 19725 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/113/05113514.pdf [firstpage_image] =>[orig_patent_app_number] => 482288 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2753474 [patent_doc_number] => 05029135 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-02 [patent_title] => 'Semiconductor memory apparatus with internal synchronization' [patent_app_type] => 1 [patent_app_number] => 7/480583 [patent_app_country] => US [patent_app_date] => 1990-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 6207 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/029/05029135.pdf [firstpage_image] =>[orig_patent_app_number] => 480583 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2770177 [patent_doc_number] => 05060196 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-22 [patent_title] => 'Circuit for adjusting voltage level of data output in a semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/471933 [patent_app_country] => US [patent_app_date] => 1990-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4396 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/060/05060196.pdf [firstpage_image] =>[orig_patent_app_number] => 471933 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2823746 [patent_doc_number] => 05079748 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-07 [patent_title] => 'Dynamic random access memory with read-write signal of shortened duration' [patent_app_type] => 1 [patent_app_number] => 7/469125 [patent_app_country] => US [patent_app_date] => 1990-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2858 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/079/05079748.pdf [firstpage_image] =>[orig_patent_app_number] => 469125 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2725339 [patent_doc_number] => 05053995 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-01 [patent_title] => 'Tunnel current data storage apparatus having separate lever bodies' [patent_app_type] => 1 [patent_app_number] => 7/468640 [patent_app_country] => US [patent_app_date] => 1990-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3818 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/053/05053995.pdf [firstpage_image] =>[orig_patent_app_number] => 468640 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2775796 [patent_doc_number] => 05007024 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-09 [patent_title] => 'Semiconductor memory device with sense amplifier controller' [patent_app_type] => 1 [patent_app_number] => 7/466920 [patent_app_country] => US [patent_app_date] => 1990-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3897 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/007/05007024.pdf [firstpage_image] =>[orig_patent_app_number] => 466920 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2823623 [patent_doc_number] => 05079741 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-07 [patent_title] => 'Portable semiconductor storage device' [patent_app_type] => 1 [patent_app_number] => 7/465500 [patent_app_country] => US [patent_app_date] => 1990-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3539 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/079/05079741.pdf [firstpage_image] =>[orig_patent_app_number] => 465500 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2682650 [patent_doc_number] => 04984201 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-08 [patent_title] => 'Semiconductor storage device with common data line structure' [patent_app_type] => 1 [patent_app_number] => 7/465983 [patent_app_country] => US [patent_app_date] => 1990-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 15939 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/984/04984201.pdf [firstpage_image] =>[orig_patent_app_number] => 465983 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2719624 [patent_doc_number] => 05018109 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-21 [patent_title] => 'Memory including address registers for increasing access speed to the memory' [patent_app_type] => 1 [patent_app_number] => 7/465890 [patent_app_country] => US [patent_app_date] => 1990-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 10494 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/018/05018109.pdf [firstpage_image] =>[orig_patent_app_number] => 465890 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2863864 [patent_doc_number] => 05126974 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-30 [patent_title] => 'Sense amplifier for a memory device' [patent_app_type] => 1 [patent_app_number] => 7/465040 [patent_app_country] => US [patent_app_date] => 1990-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 21 [patent_no_of_words] => 7208 [patent_no_of_claims] => 71 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/126/05126974.pdf [firstpage_image] =>[orig_patent_app_number] => 465040 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2843000 [patent_doc_number] => 05175835 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-29 [patent_title] => 'Multi-mode DRAM controller' [patent_app_type] => 1 [patent_app_number] => 7/463067 [patent_app_country] => US [patent_app_date] => 1990-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3133 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/175/05175835.pdf [firstpage_image] =>[orig_patent_app_number] => 463067 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2676849 [patent_doc_number] => 05070480 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-03 [patent_title] => 'Nonvolatile associative memory system' [patent_app_type] => 1 [patent_app_number] => 7/462160 [patent_app_country] => US [patent_app_date] => 1990-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2757 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/070/05070480.pdf [firstpage_image] =>[orig_patent_app_number] => 462160 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2869425 [patent_doc_number] => 05083269 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-21 [patent_title] => 'Buffer device suitable for asynchronous transfer mode communication' [patent_app_type] => 1 [patent_app_number] => 7/462118 [patent_app_country] => US [patent_app_date] => 1990-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5279 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/083/05083269.pdf [firstpage_image] =>[orig_patent_app_number] => 462118 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2929721 [patent_doc_number] => 05193153 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-09 [patent_title] => 'System for detecting overwriting of data in a buffer memory, particularly for a data switch' [patent_app_type] => 1 [patent_app_number] => 7/459407 [patent_app_country] => US [patent_app_date] => 1989-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4215 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/193/05193153.pdf [firstpage_image] =>[orig_patent_app_number] => 459407 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2832052 [patent_doc_number] => 05095461 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-03-10 [patent_title] => 'Erase circuitry for a non-volatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/457859 [patent_app_country] => US [patent_app_date] => 1989-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 26 [patent_no_of_words] => 17292 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/095/05095461.pdf [firstpage_image] =>[orig_patent_app_number] => 457859 [rel_patent_id] =>[rel_patent_doc_number] =>)