Amanda C. Abrahamson

Array ( [id] => 7636054 [patent_doc_number] => 06380606 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-30 [patent_title] => 'Locos isolation process using a layered pad nitride and dry field oxidation stack and semiconductor device employing the same' [patent_app_type] => B1 [patent_app_number] => 09/205413 [patent_app_country] => US [patent_app_date] => 1998-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4660 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/380/06380606.pdf [firstpage_image] =>[orig_patent_app_number] => 09205413 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4385635 [patent_doc_number] => 06303972 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Device including a conductive layer protected against oxidation' [patent_app_type] => 1 [patent_app_number] => 9/200253 [patent_app_country] => US [patent_app_date] => 1998-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4298 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/303/06303972.pdf [firstpage_image] =>[orig_patent_app_number] => 200253 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4292378 [patent_doc_number] => 06268627 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Semiconductor device having impurity regions with varying impurity concentrations' [patent_app_type] => 1 [patent_app_number] => 9/198611 [patent_app_country] => US [patent_app_date] => 1998-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 25 [patent_no_of_words] => 8118 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 353 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/268/06268627.pdf [firstpage_image] =>[orig_patent_app_number] => 198611 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1524864 [patent_doc_number] => 06353246 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'Semiconductor device including dislocation in merged SOI/DRAM chips' [patent_app_type] => B1 [patent_app_number] => 09/197693 [patent_app_country] => US [patent_app_date] => 1998-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2444 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353246.pdf [firstpage_image] =>[orig_patent_app_number] => 09197693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4222859 [patent_doc_number] => 06087705 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Trench isolation structure partially bound between a pair of low K dielectric structures' [patent_app_type] => 1 [patent_app_number] => 9/195592 [patent_app_country] => US [patent_app_date] => 1998-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 4099 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/087/06087705.pdf [firstpage_image] =>[orig_patent_app_number] => 195592 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4016958 [patent_doc_number] => 05962888 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Well structure non-volatile memory device and method for fabricating the same' [patent_app_type] => 1 [patent_app_number] => 9/190013 [patent_app_country] => US [patent_app_date] => 1998-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4499 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/962/05962888.pdf [firstpage_image] =>[orig_patent_app_number] => 190013 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4239107 [patent_doc_number] => 06075268 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Ultra high density inverter using a stacked transistor arrangement' [patent_app_type] => 1 [patent_app_number] => 9/188972 [patent_app_country] => US [patent_app_date] => 1998-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 5952 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/075/06075268.pdf [firstpage_image] =>[orig_patent_app_number] => 188972 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4137158 [patent_doc_number] => 06034413 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'High speed biCMOS gate power for power MOSFETs incorporating improved injection immunity' [patent_app_type] => 1 [patent_app_number] => 9/186011 [patent_app_country] => US [patent_app_date] => 1998-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4052 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 339 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/034/06034413.pdf [firstpage_image] =>[orig_patent_app_number] => 186011 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4410644 [patent_doc_number] => 06271559 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Semiconductor memory with information storage capacitance including an electrode containing precious metal and an added element' [patent_app_type] => 1 [patent_app_number] => 9/185632 [patent_app_country] => US [patent_app_date] => 1998-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3767 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/271/06271559.pdf [firstpage_image] =>[orig_patent_app_number] => 185632 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4243923 [patent_doc_number] => 06166415 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Semiconductor device with improved noise resistivity' [patent_app_type] => 1 [patent_app_number] => 9/184083 [patent_app_country] => US [patent_app_date] => 1998-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 31 [patent_no_of_words] => 6084 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/166/06166415.pdf [firstpage_image] =>[orig_patent_app_number] => 184083 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4361028 [patent_doc_number] => 06201274 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Semiconductor device with no step between well regions' [patent_app_type] => 1 [patent_app_number] => 9/179392 [patent_app_country] => US [patent_app_date] => 1998-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4231 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/201/06201274.pdf [firstpage_image] =>[orig_patent_app_number] => 179392 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4265550 [patent_doc_number] => 06259116 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-10 [patent_title] => 'Multiple memory element semiconductor memory devices' [patent_app_type] => 1 [patent_app_number] => 9/177012 [patent_app_country] => US [patent_app_date] => 1998-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 6100 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/259/06259116.pdf [firstpage_image] =>[orig_patent_app_number] => 177012 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4300966 [patent_doc_number] => 06184551 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Method of forming integrated circuit capacitors having electrodes therein that comprise conductive plugs' [patent_app_type] => 1 [patent_app_number] => 9/177421 [patent_app_country] => US [patent_app_date] => 1998-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3738 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/184/06184551.pdf [firstpage_image] =>[orig_patent_app_number] => 177421 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4113580 [patent_doc_number] => 06057597 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Semiconductor package with pre-fabricated cover' [patent_app_type] => 1 [patent_app_number] => 9/172451 [patent_app_country] => US [patent_app_date] => 1998-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 13 [patent_no_of_words] => 3704 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/057/06057597.pdf [firstpage_image] =>[orig_patent_app_number] => 172451 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4222612 [patent_doc_number] => 06087690 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Single polysilicon DRAM cell with current gain' [patent_app_type] => 1 [patent_app_number] => 9/170863 [patent_app_country] => US [patent_app_date] => 1998-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2935 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/087/06087690.pdf [firstpage_image] =>[orig_patent_app_number] => 170863 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7076922 [patent_doc_number] => 20010040266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-15 [patent_title] => 'INTEGRATED CIRCUIT WITH HIGHLY EFFICIENT JUNCTION INSULATION' [patent_app_type] => new [patent_app_number] => 09/169521 [patent_app_country] => US [patent_app_date] => 1998-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2000 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20010040266.pdf [firstpage_image] =>[orig_patent_app_number] => 09169521 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4162988 [patent_doc_number] => 06157082 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Semiconductor device having aluminum contacts or vias and method of manufacture therefor' [patent_app_type] => 1 [patent_app_number] => 9/166832 [patent_app_country] => US [patent_app_date] => 1998-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3301 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/157/06157082.pdf [firstpage_image] =>[orig_patent_app_number] => 166832 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1189863 [patent_doc_number] => 06734498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-11 [patent_title] => 'Insulated channel field effect transistor with an electric field terminal region' [patent_app_type] => B2 [patent_app_number] => 09/165483 [patent_app_country] => US [patent_app_date] => 1998-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 16 [patent_no_of_words] => 3829 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/734/06734498.pdf [firstpage_image] =>[orig_patent_app_number] => 09165483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4222481 [patent_doc_number] => 06111303 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Non-contact electronic card and its manufacturing process' [patent_app_type] => 1 [patent_app_number] => 9/164472 [patent_app_country] => US [patent_app_date] => 1998-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4572 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/111/06111303.pdf [firstpage_image] =>[orig_patent_app_number] => 164472 [rel_patent_id] =>[rel_patent_doc_number] =>)