Search

Amanda C. Abrahamson

Supervisory Patent Examiner (ID: 369, Phone: (571)270-1376 , Office: P/3688 )

Most Active Art Unit
3629
Art Unit(s)
3629, OPQA, 3688
Total Applications
197
Issued Applications
59
Pending Applications
5
Abandoned Applications
133

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4123524 [patent_doc_number] => 06072221 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Semiconductor device having self-aligned contact plug and metallized gate electrode' [patent_app_type] => 1 [patent_app_number] => 9/105021 [patent_app_country] => US [patent_app_date] => 1998-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 32 [patent_no_of_words] => 8606 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/072/06072221.pdf [firstpage_image] =>[orig_patent_app_number] => 105021 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/105021
Semiconductor device having self-aligned contact plug and metallized gate electrode Jun 25, 1998 Issued
Array ( [id] => 4132558 [patent_doc_number] => 06127717 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Totally self-aligned transistor with polysilicon shallow trench isolation' [patent_app_type] => 1 [patent_app_number] => 9/103181 [patent_app_country] => US [patent_app_date] => 1998-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 1908 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/127/06127717.pdf [firstpage_image] =>[orig_patent_app_number] => 103181 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/103181
Totally self-aligned transistor with polysilicon shallow trench isolation Jun 23, 1998 Issued
Array ( [id] => 4242521 [patent_doc_number] => 06144066 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Protection of the logic well of a component including an integrated MOS power transistor' [patent_app_type] => 1 [patent_app_number] => 9/094341 [patent_app_country] => US [patent_app_date] => 1998-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2689 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/144/06144066.pdf [firstpage_image] =>[orig_patent_app_number] => 094341 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/094341
Protection of the logic well of a component including an integrated MOS power transistor Jun 8, 1998 Issued
Array ( [id] => 4104942 [patent_doc_number] => 06066866 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'Semiconductor device with alternating general-purpose functional regions and specific functional regions' [patent_app_type] => 1 [patent_app_number] => 9/093723 [patent_app_country] => US [patent_app_date] => 1998-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 6262 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/066/06066866.pdf [firstpage_image] =>[orig_patent_app_number] => 093723 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/093723
Semiconductor device with alternating general-purpose functional regions and specific functional regions Jun 8, 1998 Issued
Array ( [id] => 4254717 [patent_doc_number] => 06222244 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Electrically blowable fuse with reduced cross-sectional area' [patent_app_type] => 1 [patent_app_number] => 9/093903 [patent_app_country] => US [patent_app_date] => 1998-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 5567 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/222/06222244.pdf [firstpage_image] =>[orig_patent_app_number] => 093903 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/093903
Electrically blowable fuse with reduced cross-sectional area Jun 7, 1998 Issued
Array ( [id] => 4301545 [patent_doc_number] => 06198154 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-06 [patent_title] => 'PNP lateral bipolar electronic device' [patent_app_type] => 1 [patent_app_number] => 9/087421 [patent_app_country] => US [patent_app_date] => 1998-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2416 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/198/06198154.pdf [firstpage_image] =>[orig_patent_app_number] => 087421 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/087421
PNP lateral bipolar electronic device May 28, 1998 Issued
Array ( [id] => 3929007 [patent_doc_number] => 05945688 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'Optical semiconductor device and lead frame used in such a device' [patent_app_type] => 1 [patent_app_number] => 9/085361 [patent_app_country] => US [patent_app_date] => 1998-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2885 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/945/05945688.pdf [firstpage_image] =>[orig_patent_app_number] => 085361 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/085361
Optical semiconductor device and lead frame used in such a device May 26, 1998 Issued
Array ( [id] => 3940639 [patent_doc_number] => 05929514 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Thermally enhanced lead-under-paddle I.C. leadframe' [patent_app_type] => 1 [patent_app_number] => 9/084671 [patent_app_country] => US [patent_app_date] => 1998-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 3369 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/929/05929514.pdf [firstpage_image] =>[orig_patent_app_number] => 084671 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/084671
Thermally enhanced lead-under-paddle I.C. leadframe May 25, 1998 Issued
Array ( [id] => 1291328 [patent_doc_number] => 06633071 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-14 [patent_title] => 'Contact on a P-type region' [patent_app_type] => B1 [patent_app_number] => 09/083713 [patent_app_country] => US [patent_app_date] => 1998-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 3606 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/633/06633071.pdf [firstpage_image] =>[orig_patent_app_number] => 09083713 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/083713
Contact on a P-type region May 21, 1998 Issued
Array ( [id] => 3940559 [patent_doc_number] => 05929508 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Defect gettering by induced stress' [patent_app_type] => 1 [patent_app_number] => 9/082892 [patent_app_country] => US [patent_app_date] => 1998-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 2306 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/929/05929508.pdf [firstpage_image] =>[orig_patent_app_number] => 082892 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/082892
Defect gettering by induced stress May 20, 1998 Issued
Array ( [id] => 4410914 [patent_doc_number] => 06232646 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Shallow trench isolation filled with thermal oxide' [patent_app_type] => 1 [patent_app_number] => 9/082607 [patent_app_country] => US [patent_app_date] => 1998-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 1577 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/232/06232646.pdf [firstpage_image] =>[orig_patent_app_number] => 082607 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/082607
Shallow trench isolation filled with thermal oxide May 19, 1998 Issued
Array ( [id] => 3926798 [patent_doc_number] => 05914512 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-22 [patent_title] => 'External contact to a MOSFET drain for testing of stacked-capacitor DRAMS' [patent_app_type] => 1 [patent_app_number] => 9/083253 [patent_app_country] => US [patent_app_date] => 1998-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2387 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/914/05914512.pdf [firstpage_image] =>[orig_patent_app_number] => 083253 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/083253
External contact to a MOSFET drain for testing of stacked-capacitor DRAMS May 19, 1998 Issued
Array ( [id] => 4355464 [patent_doc_number] => 06215167 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Power semiconductor device employing field plate and manufacturing method thereof' [patent_app_type] => 1 [patent_app_number] => 9/081832 [patent_app_country] => US [patent_app_date] => 1998-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2862 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/215/06215167.pdf [firstpage_image] =>[orig_patent_app_number] => 081832 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/081832
Power semiconductor device employing field plate and manufacturing method thereof May 18, 1998 Issued
Array ( [id] => 4161742 [patent_doc_number] => 06104081 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Semiconductor device with semiconductor elements formed in a layer of semiconductor material glued on a support wafer' [patent_app_type] => 1 [patent_app_number] => 9/080784 [patent_app_country] => US [patent_app_date] => 1998-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3045 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/104/06104081.pdf [firstpage_image] =>[orig_patent_app_number] => 080784 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/080784
Semiconductor device with semiconductor elements formed in a layer of semiconductor material glued on a support wafer May 17, 1998 Issued
Array ( [id] => 4244025 [patent_doc_number] => 06166422 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Inductor with cobalt/nickel core for integrated circuit structure with high inductance and high Q-factor' [patent_app_type] => 1 [patent_app_number] => 9/079413 [patent_app_country] => US [patent_app_date] => 1998-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 4604 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/166/06166422.pdf [firstpage_image] =>[orig_patent_app_number] => 079413 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/079413
Inductor with cobalt/nickel core for integrated circuit structure with high inductance and high Q-factor May 12, 1998 Issued
Array ( [id] => 4179764 [patent_doc_number] => 06084275 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Double coding mask read only memory (mask ROM) for minimizing band-to-band leakage' [patent_app_type] => 1 [patent_app_number] => 9/072291 [patent_app_country] => US [patent_app_date] => 1998-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 2841 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/084/06084275.pdf [firstpage_image] =>[orig_patent_app_number] => 072291 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/072291
Double coding mask read only memory (mask ROM) for minimizing band-to-band leakage May 3, 1998 Issued
Array ( [id] => 4161941 [patent_doc_number] => 06104095 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Printed circuit board and chip-on-board packages using same' [patent_app_type] => 1 [patent_app_number] => 9/087903 [patent_app_country] => US [patent_app_date] => 1998-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4099 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/104/06104095.pdf [firstpage_image] =>[orig_patent_app_number] => 087903 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/087903
Printed circuit board and chip-on-board packages using same Apr 30, 1998 Issued
Array ( [id] => 4196496 [patent_doc_number] => 06130469 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Electrically alterable antifuse using FET' [patent_app_type] => 1 [patent_app_number] => 9/066122 [patent_app_country] => US [patent_app_date] => 1998-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1304 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130469.pdf [firstpage_image] =>[orig_patent_app_number] => 066122 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/066122
Electrically alterable antifuse using FET Apr 23, 1998 Issued
Array ( [id] => 4132416 [patent_doc_number] => 06127706 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Trench-free buried contact for SRAM devices' [patent_app_type] => 1 [patent_app_number] => 9/065323 [patent_app_country] => US [patent_app_date] => 1998-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 3191 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/127/06127706.pdf [firstpage_image] =>[orig_patent_app_number] => 065323 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/065323
Trench-free buried contact for SRAM devices Apr 22, 1998 Issued
Array ( [id] => 4190517 [patent_doc_number] => 06160292 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Circuit and methods to improve the operation of SOI devices' [patent_app_type] => 1 [patent_app_number] => 9/063823 [patent_app_country] => US [patent_app_date] => 1998-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4151 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/160/06160292.pdf [firstpage_image] =>[orig_patent_app_number] => 063823 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/063823
Circuit and methods to improve the operation of SOI devices Apr 21, 1998 Issued
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