Search

Amanda C Walke

Examiner (ID: 16999, Phone: (571)272-1337 , Office: P/1722 )

Most Active Art Unit
1722
Art Unit(s)
1752, 1722, 1737, 1795
Total Applications
2637
Issued Applications
2172
Pending Applications
129
Abandoned Applications
336

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17992044 [patent_doc_number] => 20220358081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => SYSTEMS AND METHODS FOR IMPLEMENTING A MACHINE PERCEPTION AND DENSE ALGORITHM INTEGRATED CIRCUIT AND ENABLING A FLOWING PROPAGATION OF DATA WITHIN THE INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/873585 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10927 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873585 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/873585
Systems and methods for implementing a machine perception and dense algorithm integrated circuit and enabling a flowing propagation of data within the integrated circuit Jul 25, 2022 Issued
Array ( [id] => 17947824 [patent_doc_number] => 20220334843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => METHOD AND APPARATUS FOR STATELESS PARALLEL PROCESSING OF TASKS AND WORKFLOWS [patent_app_type] => utility [patent_app_number] => 17/855477 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7286 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855477 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855477
Method and apparatus for stateless parallel processing of tasks and workflows Jun 29, 2022 Issued
Array ( [id] => 17809414 [patent_doc_number] => 20220261249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => ADDRESS GENERATION METHOD, RELATED APPARATUS, AND STORAGE MEDIUM [patent_app_type] => utility [patent_app_number] => 17/730058 [patent_app_country] => US [patent_app_date] => 2022-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17147 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17730058 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/730058
Address generation method, related apparatus, and storage medium Apr 25, 2022 Issued
Array ( [id] => 18802832 [patent_doc_number] => 11835989 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-12-05 [patent_title] => FPGA search in a cloud compute node [patent_app_type] => utility [patent_app_number] => 17/725946 [patent_app_country] => US [patent_app_date] => 2022-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 18884 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17725946 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/725946
FPGA search in a cloud compute node Apr 20, 2022 Issued
Array ( [id] => 17581123 [patent_doc_number] => 20220137978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => METHOD AND APPARATUS FOR STATELESS PARALLEL PROCESSING OF TASKS AND WORKFLOWS [patent_app_type] => utility [patent_app_number] => 17/647911 [patent_app_country] => US [patent_app_date] => 2022-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17647911 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/647911
Method and apparatus for stateless parallel processing of tasks and workflows Jan 12, 2022 Issued
Array ( [id] => 17629172 [patent_doc_number] => 20220164187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-26 [patent_title] => MEMORY LOOKUP COMPUTING MECHANISMS [patent_app_type] => utility [patent_app_number] => 17/538556 [patent_app_country] => US [patent_app_date] => 2021-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5778 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17538556 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/538556
Memory lookup computing mechanisms Nov 29, 2021 Issued
Array ( [id] => 18644622 [patent_doc_number] => 11768690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-26 [patent_title] => Coprocessor context priority [patent_app_type] => utility [patent_app_number] => 17/532072 [patent_app_country] => US [patent_app_date] => 2021-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 11453 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17532072 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/532072
Coprocessor context priority Nov 21, 2021 Issued
Array ( [id] => 18592002 [patent_doc_number] => 11740900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-29 [patent_title] => Associatively indexed circular buffer [patent_app_type] => utility [patent_app_number] => 17/354810 [patent_app_country] => US [patent_app_date] => 2021-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5546 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17354810 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/354810
Associatively indexed circular buffer Jun 21, 2021 Issued
Array ( [id] => 17084052 [patent_doc_number] => 20210279058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => Control Transfer Termination Instructions Of An Instruction Set Architecture (ISA) [patent_app_type] => utility [patent_app_number] => 17/329231 [patent_app_country] => US [patent_app_date] => 2021-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9460 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17329231 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/329231
Control transfer termination instructions of an instruction set architecture (ISA) May 24, 2021 Issued
Array ( [id] => 17069267 [patent_doc_number] => 20210271483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => Control system for process data and method for controlling process data [patent_app_type] => utility [patent_app_number] => 17/246816 [patent_app_country] => US [patent_app_date] => 2021-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6802 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17246816 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/246816
Control system for process data and method for controlling process data May 2, 2021 Issued
Array ( [id] => 18386064 [patent_doc_number] => 11656845 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Dot product calculators and methods of operating the same [patent_app_type] => utility [patent_app_number] => 17/243282 [patent_app_country] => US [patent_app_date] => 2021-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 13322 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17243282 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/243282
Dot product calculators and methods of operating the same Apr 27, 2021 Issued
Array ( [id] => 16993977 [patent_doc_number] => 20210232397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-29 [patent_title] => MASK PATTERNS GENERATED IN MEMORY FROM SEED VECTORS [patent_app_type] => utility [patent_app_number] => 17/228518 [patent_app_country] => US [patent_app_date] => 2021-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17228518 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/228518
Mask patterns generated in memory from seed vectors Apr 11, 2021 Issued
Array ( [id] => 18606644 [patent_doc_number] => 11748108 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Instruction executing method and apparatus, electronic device, and computer-readable storage medium [patent_app_type] => utility [patent_app_number] => 17/210616 [patent_app_country] => US [patent_app_date] => 2021-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6240 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17210616 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/210616
Instruction executing method and apparatus, electronic device, and computer-readable storage medium Mar 23, 2021 Issued
Array ( [id] => 18304941 [patent_doc_number] => 11626858 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => System improving signal handling [patent_app_type] => utility [patent_app_number] => 17/196946 [patent_app_country] => US [patent_app_date] => 2021-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 13934 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17196946 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/196946
System improving signal handling Mar 8, 2021 Issued
Array ( [id] => 17394764 [patent_doc_number] => 11243778 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-02-08 [patent_title] => Instruction dispatch for superscalar processors [patent_app_type] => utility [patent_app_number] => 17/139425 [patent_app_country] => US [patent_app_date] => 2020-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7970 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17139425 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/139425
Instruction dispatch for superscalar processors Dec 30, 2020 Issued
Array ( [id] => 18291235 [patent_doc_number] => 11620105 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => Hybrid floating point representation for deep learning acceleration [patent_app_type] => utility [patent_app_number] => 17/128407 [patent_app_country] => US [patent_app_date] => 2020-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9264 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17128407 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/128407
Hybrid floating point representation for deep learning acceleration Dec 20, 2020 Issued
Array ( [id] => 17076669 [patent_doc_number] => 11113067 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-09-07 [patent_title] => Speculative branch pattern update [patent_app_type] => utility [patent_app_number] => 17/099852 [patent_app_country] => US [patent_app_date] => 2020-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8218 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17099852 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/099852
Speculative branch pattern update Nov 16, 2020 Issued
Array ( [id] => 18577692 [patent_doc_number] => 11734224 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Overlay layer hardware unit for network of processor cores [patent_app_type] => utility [patent_app_number] => 17/035046 [patent_app_country] => US [patent_app_date] => 2020-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 14460 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17035046 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/035046
Overlay layer hardware unit for network of processor cores Sep 27, 2020 Issued
Array ( [id] => 17121066 [patent_doc_number] => 11132200 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-09-28 [patent_title] => Loop end prediction using loop counter updated by inflight loop end instructions [patent_app_type] => utility [patent_app_number] => 17/034519 [patent_app_country] => US [patent_app_date] => 2020-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6672 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17034519 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/034519
Loop end prediction using loop counter updated by inflight loop end instructions Sep 27, 2020 Issued
Array ( [id] => 18547012 [patent_doc_number] => 11720364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Methods and apparatus to dynamically enable and/or disable prefetchers [patent_app_type] => utility [patent_app_number] => 17/033282 [patent_app_country] => US [patent_app_date] => 2020-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11874 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17033282 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/033282
Methods and apparatus to dynamically enable and/or disable prefetchers Sep 24, 2020 Issued
Menu