Search

Amanda C Walke

Examiner (ID: 16999, Phone: (571)272-1337 , Office: P/1722 )

Most Active Art Unit
1722
Art Unit(s)
1752, 1722, 1737, 1795
Total Applications
2637
Issued Applications
2172
Pending Applications
129
Abandoned Applications
336

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17164804 [patent_doc_number] => 11150900 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Execution or write mask generation for data selection in a multi-threaded, self-scheduling reconfigurable computing fabric [patent_app_type] => utility [patent_app_number] => 16/996055 [patent_app_country] => US [patent_app_date] => 2020-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 32 [patent_no_of_words] => 35504 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16996055 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/996055
Execution or write mask generation for data selection in a multi-threaded, self-scheduling reconfigurable computing fabric Aug 17, 2020 Issued
Array ( [id] => 16470275 [patent_doc_number] => 20200371812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => Coprocessor Memory Ordering Table [patent_app_type] => utility [patent_app_number] => 16/991858 [patent_app_country] => US [patent_app_date] => 2020-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16991858 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/991858
Coprocessor memory ordering table Aug 11, 2020 Issued
Array ( [id] => 18606640 [patent_doc_number] => 11748104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Microprocessor that fuses load and compare instructions [patent_app_type] => utility [patent_app_number] => 16/941969 [patent_app_country] => US [patent_app_date] => 2020-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5995 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16941969 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/941969
Microprocessor that fuses load and compare instructions Jul 28, 2020 Issued
Array ( [id] => 16986908 [patent_doc_number] => 11074080 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-27 [patent_title] => Apparatus and branch prediction circuitry having first and second branch prediction schemes, and method [patent_app_type] => utility [patent_app_number] => 16/864223 [patent_app_country] => US [patent_app_date] => 2020-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 9921 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16864223 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/864223
Apparatus and branch prediction circuitry having first and second branch prediction schemes, and method Apr 30, 2020 Issued
Array ( [id] => 17542771 [patent_doc_number] => 11307893 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Pipelining for step input dataset and output dataset [patent_app_type] => utility [patent_app_number] => 16/832287 [patent_app_country] => US [patent_app_date] => 2020-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 9443 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16832287 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/832287
Pipelining for step input dataset and output dataset Mar 26, 2020 Issued
Array ( [id] => 16299747 [patent_doc_number] => 20200285470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-10 [patent_title] => Cache Preload Operations Using Streaming Engine [patent_app_type] => utility [patent_app_number] => 16/827875 [patent_app_country] => US [patent_app_date] => 2020-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 33224 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16827875 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/827875
Cache preload operations using streaming engine Mar 23, 2020 Issued
Array ( [id] => 17557805 [patent_doc_number] => 11314509 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-26 [patent_title] => Processing of plural-register-load instruction [patent_app_type] => utility [patent_app_number] => 16/823695 [patent_app_country] => US [patent_app_date] => 2020-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 18751 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16823695 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/823695
Processing of plural-register-load instruction Mar 18, 2020 Issued
Array ( [id] => 16364363 [patent_doc_number] => 20200321114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => METHODS AND SYSTEMS FOR SELF-FULFILLMENT OF AN ALIMENTARY INSTRUCTION SET BASED ON VIBRANT CONSTITUTIONAL GUIDANCE [patent_app_type] => utility [patent_app_number] => 16/781601 [patent_app_country] => US [patent_app_date] => 2020-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 51693 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16781601 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/781601
Methods and systems for self-fulfillment of an alimentary instruction set based on vibrant constitutional guidance Feb 3, 2020 Issued
Array ( [id] => 17558965 [patent_doc_number] => 11315684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-26 [patent_title] => Systems and methods for generating alimentary instruction sets based on vibrant constitutional guidance [patent_app_type] => utility [patent_app_number] => 16/779091 [patent_app_country] => US [patent_app_date] => 2020-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 45619 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16779091 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/779091
Systems and methods for generating alimentary instruction sets based on vibrant constitutional guidance Jan 30, 2020 Issued
Array ( [id] => 16520843 [patent_doc_number] => 10872058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-22 [patent_title] => Apparatus and method for processing data by a reconfigurable part of a digital chip [patent_app_type] => utility [patent_app_number] => 16/740562 [patent_app_country] => US [patent_app_date] => 2020-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5164 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16740562 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/740562
Apparatus and method for processing data by a reconfigurable part of a digital chip Jan 12, 2020 Issued
Array ( [id] => 16364359 [patent_doc_number] => 20200321110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => SYSTEMS AND METHODS FOR GENERATING ALIMENTARY INSTRUCTION SETS BASED ON VIBRANT CONSTITUTIONAL GUIDANCE [patent_app_type] => utility [patent_app_number] => 16/729330 [patent_app_country] => US [patent_app_date] => 2019-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 35974 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16729330 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/729330
Systems and methods for generating alimentary instruction sets based on vibrant constitutional guidance Dec 27, 2019 Issued
Array ( [id] => 15967115 [patent_doc_number] => 20200167309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-28 [patent_title] => RECONFIGURABLE FABRIC CONFIGURATION USING SPATIAL AND TEMPORAL ROUTING [patent_app_type] => utility [patent_app_number] => 16/697571 [patent_app_country] => US [patent_app_date] => 2019-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24290 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16697571 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/697571
RECONFIGURABLE FABRIC CONFIGURATION USING SPATIAL AND TEMPORAL ROUTING Nov 26, 2019 Abandoned
Array ( [id] => 17572827 [patent_doc_number] => 11321095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Indirect branch predictor security protection [patent_app_type] => utility [patent_app_number] => 16/663621 [patent_app_country] => US [patent_app_date] => 2019-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 11203 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16663621 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/663621
Indirect branch predictor security protection Oct 24, 2019 Issued
Array ( [id] => 18547170 [patent_doc_number] => 11720523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Performing concurrent operations in a processing element [patent_app_type] => utility [patent_app_number] => 16/653578 [patent_app_country] => US [patent_app_date] => 2019-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 14249 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16653578 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/653578
Performing concurrent operations in a processing element Oct 14, 2019 Issued
Array ( [id] => 15349265 [patent_doc_number] => 20200012524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-09 [patent_title] => Processor and Instruction Scheduling Method [patent_app_type] => utility [patent_app_number] => 16/577092 [patent_app_country] => US [patent_app_date] => 2019-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9138 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16577092 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/577092
Processor and instruction scheduling method Sep 19, 2019 Issued
Array ( [id] => 17437713 [patent_doc_number] => 11263046 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-01 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/576468 [patent_app_country] => US [patent_app_date] => 2019-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 15888 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16576468 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/576468
Semiconductor device Sep 18, 2019 Issued
Array ( [id] => 16486156 [patent_doc_number] => 20200379761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => LOOK-UP TABLE WRITE [patent_app_type] => utility [patent_app_number] => 16/570519 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23636 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16570519 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/570519
Look-up table write Sep 12, 2019 Issued
Array ( [id] => 17352184 [patent_doc_number] => 11226821 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-18 [patent_title] => Computer processor employing operand data with associated meta-data [patent_app_type] => utility [patent_app_number] => 16/566040 [patent_app_country] => US [patent_app_date] => 2019-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 30 [patent_no_of_words] => 19238 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 366 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16566040 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/566040
Computer processor employing operand data with associated meta-data Sep 9, 2019 Issued
Array ( [id] => 15594355 [patent_doc_number] => 20200073712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => METHOD, APPARATUS, DEVICE AND MEDIUM FOR PROCESSING TOPOLOGICAL RELATION OF TASKS [patent_app_type] => utility [patent_app_number] => 16/553852 [patent_app_country] => US [patent_app_date] => 2019-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5098 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16553852 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/553852
Method, apparatus, device and medium for processing topological relation of tasks Aug 27, 2019 Issued
Array ( [id] => 17572819 [patent_doc_number] => 11321087 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => ISA enhancements for accelerated deep learning [patent_app_type] => utility [patent_app_number] => 17/271532 [patent_app_country] => US [patent_app_date] => 2019-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 60 [patent_no_of_words] => 72444 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17271532 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/271532
ISA enhancements for accelerated deep learning Aug 26, 2019 Issued
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