
Amanda J. Barrow
Examiner (ID: 5901, Phone: (571)270-7867 , Office: P/1729 )
| Most Active Art Unit | 1729 |
| Art Unit(s) | 1729, 1795, 4111 |
| Total Applications | 786 |
| Issued Applications | 398 |
| Pending Applications | 78 |
| Abandoned Applications | 324 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17130477
[patent_doc_number] => 20210305246
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-30
[patent_title] => AIR SPACER AND CAPPING STRUCTURES IN SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/006167
[patent_app_country] => US
[patent_app_date] => 2020-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6551
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17006167
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/006167 | Air spacer and capping structures in semiconductor devices | Aug 27, 2020 | Issued |
Array
(
[id] => 18431634
[patent_doc_number] => 11676864
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-06-13
[patent_title] => Semiconductor device structure and methods of forming the same
[patent_app_type] => utility
[patent_app_number] => 17/005172
[patent_app_country] => US
[patent_app_date] => 2020-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 49
[patent_figures_cnt] => 60
[patent_no_of_words] => 12126
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17005172
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/005172 | Semiconductor device structure and methods of forming the same | Aug 26, 2020 | Issued |
Array
(
[id] => 17286644
[patent_doc_number] => 11203183
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-12-21
[patent_title] => Single and multi-layer, flat glass-sensor structures
[patent_app_type] => utility
[patent_app_number] => 17/001672
[patent_app_country] => US
[patent_app_date] => 2020-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 16
[patent_no_of_words] => 8780
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17001672
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/001672 | Single and multi-layer, flat glass-sensor structures | Aug 23, 2020 | Issued |
Array
(
[id] => 16471849
[patent_doc_number] => 20200373387
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-26
[patent_title] => SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 16/993514
[patent_app_country] => US
[patent_app_date] => 2020-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12599
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 356
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16993514
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/993514 | Semiconductor devices | Aug 13, 2020 | Issued |
Array
(
[id] => 16471851
[patent_doc_number] => 20200373389
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-26
[patent_title] => LDD-FREE SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD OF THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/992901
[patent_app_country] => US
[patent_app_date] => 2020-08-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6029
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16992901
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/992901 | LDD-free semiconductor structure and manufacturing method of the same | Aug 12, 2020 | Issued |
Array
(
[id] => 18304485
[patent_doc_number] => 11626401
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-04-11
[patent_title] => Integrated circuit devices and methods of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/991530
[patent_app_country] => US
[patent_app_date] => 2020-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 8866
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16991530
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/991530 | Integrated circuit devices and methods of manufacturing the same | Aug 11, 2020 | Issued |
Array
(
[id] => 18704883
[patent_doc_number] => 11791401
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-17
[patent_title] => Multi-gate device and related methods
[patent_app_type] => utility
[patent_app_number] => 16/947381
[patent_app_country] => US
[patent_app_date] => 2020-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 40
[patent_no_of_words] => 10137
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16947381
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/947381 | Multi-gate device and related methods | Jul 29, 2020 | Issued |
Array
(
[id] => 16440704
[patent_doc_number] => 20200358031
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-12
[patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/937101
[patent_app_country] => US
[patent_app_date] => 2020-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7175
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16937101
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/937101 | Display device and method of manufacturing the same | Jul 22, 2020 | Issued |
Array
(
[id] => 16920682
[patent_doc_number] => 20210193774
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-24
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/937038
[patent_app_country] => US
[patent_app_date] => 2020-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17654
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16937038
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/937038 | Display device | Jul 22, 2020 | Issued |
Array
(
[id] => 18402130
[patent_doc_number] => 11664278
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-05-30
[patent_title] => Semiconductor device with L-shape conductive feature and methods of forming the same
[patent_app_type] => utility
[patent_app_number] => 16/935830
[patent_app_country] => US
[patent_app_date] => 2020-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 34
[patent_no_of_words] => 9804
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16935830
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/935830 | Semiconductor device with L-shape conductive feature and methods of forming the same | Jul 21, 2020 | Issued |
Array
(
[id] => 16700026
[patent_doc_number] => 10950634
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-03-16
[patent_title] => Metal oxide and semiconductor device
[patent_app_type] => utility
[patent_app_number] => 16/935469
[patent_app_country] => US
[patent_app_date] => 2020-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 56
[patent_no_of_words] => 26581
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16935469
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/935469 | Metal oxide and semiconductor device | Jul 21, 2020 | Issued |
Array
(
[id] => 18105675
[patent_doc_number] => 11545575
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-03
[patent_title] => IC structure with fin having subfin extents with different lateral dimensions
[patent_app_type] => utility
[patent_app_number] => 16/919225
[patent_app_country] => US
[patent_app_date] => 2020-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 17
[patent_no_of_words] => 5679
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16919225
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/919225 | IC structure with fin having subfin extents with different lateral dimensions | Jul 1, 2020 | Issued |
Array
(
[id] => 19079592
[patent_doc_number] => 11948972
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-02
[patent_title] => High-voltage nano-sheet transistor
[patent_app_type] => utility
[patent_app_number] => 16/916951
[patent_app_country] => US
[patent_app_date] => 2020-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 7878
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16916951
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/916951 | High-voltage nano-sheet transistor | Jun 29, 2020 | Issued |
Array
(
[id] => 16850687
[patent_doc_number] => 20210151432
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-20
[patent_title] => INTEGRATED CIRCUITS AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/912427
[patent_app_country] => US
[patent_app_date] => 2020-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10610
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16912427
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/912427 | Integrated circuits and method of manufacturing the same | Jun 24, 2020 | Issued |
Array
(
[id] => 18983668
[patent_doc_number] => 11908857
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-20
[patent_title] => Semiconductor devices having late-formed isolation structures
[patent_app_type] => utility
[patent_app_number] => 16/901417
[patent_app_country] => US
[patent_app_date] => 2020-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 4609
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 326
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16901417
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/901417 | Semiconductor devices having late-formed isolation structures | Jun 14, 2020 | Issued |
Array
(
[id] => 18131373
[patent_doc_number] => 11557590
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-17
[patent_title] => Transistor gate profile optimization
[patent_app_type] => utility
[patent_app_number] => 16/899268
[patent_app_country] => US
[patent_app_date] => 2020-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 24
[patent_no_of_words] => 11912
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16899268
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/899268 | Transistor gate profile optimization | Jun 10, 2020 | Issued |
Array
(
[id] => 18054052
[patent_doc_number] => 11527444
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-12-13
[patent_title] => Air spacer formation for semiconductor devices
[patent_app_type] => utility
[patent_app_number] => 16/899225
[patent_app_country] => US
[patent_app_date] => 2020-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 15
[patent_no_of_words] => 7960
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16899225
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/899225 | Air spacer formation for semiconductor devices | Jun 10, 2020 | Issued |
Array
(
[id] => 17130620
[patent_doc_number] => 20210305389
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-30
[patent_title] => Gate-All-Around Devices with Optimized Gate Spacers and Gate End Dielectric
[patent_app_type] => utility
[patent_app_number] => 16/899321
[patent_app_country] => US
[patent_app_date] => 2020-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12331
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16899321
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/899321 | Gate-all-around devices with optimized gate spacers and gate end dielectric | Jun 10, 2020 | Issued |
Array
(
[id] => 17574086
[patent_doc_number] => 11322360
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-03
[patent_title] => Method of manufacturing semiconductor structure
[patent_app_type] => utility
[patent_app_number] => 16/897249
[patent_app_country] => US
[patent_app_date] => 2020-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 31
[patent_no_of_words] => 10548
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16897249
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/897249 | Method of manufacturing semiconductor structure | Jun 8, 2020 | Issued |
Array
(
[id] => 16485230
[patent_doc_number] => 20200378833
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-03
[patent_title] => INFRARED DETECTION APPARATUS
[patent_app_type] => utility
[patent_app_number] => 16/889095
[patent_app_country] => US
[patent_app_date] => 2020-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9803
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16889095
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/889095 | INFRARED DETECTION APPARATUS | May 31, 2020 | Abandoned |