Search

Amanda J. Barrow

Examiner (ID: 5901, Phone: (571)270-7867 , Office: P/1729 )

Most Active Art Unit
1729
Art Unit(s)
1729, 1795, 4111
Total Applications
786
Issued Applications
398
Pending Applications
78
Abandoned Applications
324

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16316458 [patent_doc_number] => 20200295196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/888904 [patent_app_country] => US [patent_app_date] => 2020-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 42922 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16888904 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/888904
Semiconductor device and method for manufacturing the same May 31, 2020 Issued
Array ( [id] => 16617494 [patent_doc_number] => 20210036147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => GATE STRUCTURE, METHOD OF FORMING THE SAME, AND SEMICONDUCTOR DEVICE HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 16/888846 [patent_app_country] => US [patent_app_date] => 2020-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11759 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16888846 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/888846
Gate structure, method of forming the same, and semiconductor device having the same May 30, 2020 Issued
Array ( [id] => 18054138 [patent_doc_number] => 11527533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-13 [patent_title] => FinFET pitch scaling [patent_app_type] => utility [patent_app_number] => 16/888457 [patent_app_country] => US [patent_app_date] => 2020-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 23 [patent_no_of_words] => 5251 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16888457 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/888457
FinFET pitch scaling May 28, 2020 Issued
Array ( [id] => 17263126 [patent_doc_number] => 20210376111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => Semiconductor Devices with Air Gate Spacer and Air Gate Cap [patent_app_type] => utility [patent_app_number] => 16/888138 [patent_app_country] => US [patent_app_date] => 2020-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10474 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16888138 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/888138
Semiconductor devices with air gate spacer and air gate cap May 28, 2020 Issued
Array ( [id] => 16286205 [patent_doc_number] => 20200279807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-03 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/876086 [patent_app_country] => US [patent_app_date] => 2020-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6014 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16876086 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/876086
Semiconductor device and method of fabricating the same May 16, 2020 Issued
Array ( [id] => 16796296 [patent_doc_number] => 20210126113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURE [patent_app_type] => utility [patent_app_number] => 16/872058 [patent_app_country] => US [patent_app_date] => 2020-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12218 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16872058 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/872058
Semiconductor devices and methods of manufacture May 10, 2020 Issued
Array ( [id] => 17040674 [patent_doc_number] => 20210257310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => Alignment Structure for Semiconductor Device and Method of Forming Same [patent_app_type] => utility [patent_app_number] => 16/869894 [patent_app_country] => US [patent_app_date] => 2020-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9904 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16869894 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/869894
Alignment structure for semiconductor device and method of forming same May 7, 2020 Issued
Array ( [id] => 17365996 [patent_doc_number] => 11233027 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-25 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/866109 [patent_app_country] => US [patent_app_date] => 2020-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 3151 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16866109 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/866109
Semiconductor device May 3, 2020 Issued
Array ( [id] => 17716651 [patent_doc_number] => 11380650 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Batch manufacture of component carriers [patent_app_type] => utility [patent_app_number] => 15/929291 [patent_app_country] => US [patent_app_date] => 2020-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 47 [patent_no_of_words] => 12260 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15929291 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/929291
Batch manufacture of component carriers Apr 22, 2020 Issued
Array ( [id] => 17787861 [patent_doc_number] => 11410997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/855321 [patent_app_country] => US [patent_app_date] => 2020-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 8643 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16855321 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/855321
Semiconductor devices Apr 21, 2020 Issued
Array ( [id] => 17145434 [patent_doc_number] => 20210313447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => TRANSISTOR STRUCTURE WITH SILICIDE LAYER AND FABRICATING METHOD OF THE SAME [patent_app_type] => utility [patent_app_number] => 16/852539 [patent_app_country] => US [patent_app_date] => 2020-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2963 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16852539 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/852539
TRANSISTOR STRUCTURE WITH SILICIDE LAYER AND FABRICATING METHOD OF THE SAME Apr 18, 2020 Abandoned
Array ( [id] => 16845999 [patent_doc_number] => 11018095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-25 [patent_title] => Semiconductor structure [patent_app_type] => utility [patent_app_number] => 16/852124 [patent_app_country] => US [patent_app_date] => 2020-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 7883 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16852124 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/852124
Semiconductor structure Apr 16, 2020 Issued
Array ( [id] => 17847936 [patent_doc_number] => 11437321 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-06 [patent_title] => Standard-cell layout structure with horn power and smart metal cut [patent_app_type] => utility [patent_app_number] => 16/846690 [patent_app_country] => US [patent_app_date] => 2020-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 7244 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16846690 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/846690
Standard-cell layout structure with horn power and smart metal cut Apr 12, 2020 Issued
Array ( [id] => 18304588 [patent_doc_number] => 11626505 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Dielectric inner spacers in multi-gate field-effect transistors [patent_app_type] => utility [patent_app_number] => 16/847321 [patent_app_country] => US [patent_app_date] => 2020-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 41 [patent_no_of_words] => 9405 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16847321 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/847321
Dielectric inner spacers in multi-gate field-effect transistors Apr 12, 2020 Issued
Array ( [id] => 16210334 [patent_doc_number] => 20200243324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 16/845562 [patent_app_country] => US [patent_app_date] => 2020-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16845562 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/845562
Method of manufacturing semiconductor device, recording medium, and substrate processing method Apr 9, 2020 Issued
Array ( [id] => 16210335 [patent_doc_number] => 20200243325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM [patent_app_type] => utility [patent_app_number] => 16/845625 [patent_app_country] => US [patent_app_date] => 2020-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16845625 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/845625
Method of manufacturing semiconductor device, recording medium, and substrate processing method Apr 9, 2020 Issued
Array ( [id] => 17825743 [patent_doc_number] => 11430697 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-30 [patent_title] => Method of forming a mask layer [patent_app_type] => utility [patent_app_number] => 16/843706 [patent_app_country] => US [patent_app_date] => 2020-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 26 [patent_no_of_words] => 4707 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16843706 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/843706
Method of forming a mask layer Apr 7, 2020 Issued
Array ( [id] => 17145436 [patent_doc_number] => 20210313449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/837432 [patent_app_country] => US [patent_app_date] => 2020-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5974 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16837432 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/837432
Semiconductor device structure and method for forming the same Mar 31, 2020 Issued
Array ( [id] => 17130475 [patent_doc_number] => 20210305244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => GATE SPACING IN INTEGRATED CIRCUIT STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/831681 [patent_app_country] => US [patent_app_date] => 2020-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14236 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16831681 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/831681
Gate spacing in integrated circuit structures Mar 25, 2020 Issued
Array ( [id] => 17130474 [patent_doc_number] => 20210305243 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => GATE ENDCAP ARCHITECTURES HAVING RELATIVELY SHORT VERTICAL STACK [patent_app_type] => utility [patent_app_number] => 16/830120 [patent_app_country] => US [patent_app_date] => 2020-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11110 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16830120 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/830120
Gate endcap architectures having relatively short vertical stack Mar 24, 2020 Issued
Menu