Search

Amanda J. Barrow

Examiner (ID: 5901, Phone: (571)270-7867 , Office: P/1729 )

Most Active Art Unit
1729
Art Unit(s)
1729, 1795, 4111
Total Applications
786
Issued Applications
398
Pending Applications
78
Abandoned Applications
324

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17284121 [patent_doc_number] => 11201163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => High-density NOR-type flash memory [patent_app_type] => utility [patent_app_number] => 15/859499 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3376 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859499 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859499
High-density NOR-type flash memory Dec 29, 2017 Issued
Array ( [id] => 14542777 [patent_doc_number] => 20190207010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => SILICIDE BLOCK INTEGRATION FOR CMOS TECHNOLOGY [patent_app_type] => utility [patent_app_number] => 15/859492 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5127 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859492 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859492
SILICIDE BLOCK INTEGRATION FOR CMOS TECHNOLOGY Dec 29, 2017 Abandoned
Array ( [id] => 14542401 [patent_doc_number] => 20190206822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => MISSING BUMP PREVENTION FROM GALVANIC CORROSION BY COPPER BUMP SIDEWALL PROTECTION [patent_app_type] => utility [patent_app_number] => 15/859481 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6685 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859481 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859481
MISSING BUMP PREVENTION FROM GALVANIC CORROSION BY COPPER BUMP SIDEWALL PROTECTION Dec 29, 2017 Abandoned
Array ( [id] => 14542939 [patent_doc_number] => 20190207091 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => HIGH RETENTION STORAGE LAYER USING ULTRA-LOW RA MgO PROCESS IN PERPENDICULAR MAGNETIC TUNNEL JUNCTIONS FOR MRAM DEVICES [patent_app_type] => utility [patent_app_number] => 15/859458 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3884 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859458 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859458
High retention storage layer using ultra-low RA MgO process in perpendicular magnetic tunnel junctions for MRAM devices Dec 29, 2017 Issued
Array ( [id] => 14542263 [patent_doc_number] => 20190206753 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => BICONTINUOUS POROUS CERAMIC COMPOSITE FOR SEMICONDUCTOR PACKAGE APPLICATIONS [patent_app_type] => utility [patent_app_number] => 15/859483 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8267 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859483 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859483
BICONTINUOUS POROUS CERAMIC COMPOSITE FOR SEMICONDUCTOR PACKAGE APPLICATIONS Dec 29, 2017 Abandoned
Array ( [id] => 14542521 [patent_doc_number] => 20190206882 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => MEMORIES WITH SOURCE DIFFUSIONS ELECTRICALLY COUPLED TO SOURCE-CONTACTED LAYERS [patent_app_type] => utility [patent_app_number] => 15/859426 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859426 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859426
MEMORIES WITH SOURCE DIFFUSIONS ELECTRICALLY COUPLED TO SOURCE-CONTACTED LAYERS Dec 29, 2017 Abandoned
Array ( [id] => 16638067 [patent_doc_number] => 10916582 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Vertically-strained silicon device for use with a perpendicular magnetic tunnel junction (PMTJ) [patent_app_type] => utility [patent_app_number] => 15/859453 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 11207 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859453 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859453
Vertically-strained silicon device for use with a perpendicular magnetic tunnel junction (PMTJ) Dec 29, 2017 Issued
Array ( [id] => 13996539 [patent_doc_number] => 20190067427 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => INTER-POLY OXIDE IN FIELD EFFECT TRANSISTORS [patent_app_type] => utility [patent_app_number] => 15/836328 [patent_app_country] => US [patent_app_date] => 2017-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3271 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15836328 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/836328
INTER-POLY OXIDE IN FIELD EFFECT TRANSISTORS Dec 7, 2017 Abandoned
Array ( [id] => 14446443 [patent_doc_number] => 20190181095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => EMI SHIELDING FOR DISCRETE INTEGRATED CIRCUIT PACKAGES [patent_app_type] => utility [patent_app_number] => 15/836262 [patent_app_country] => US [patent_app_date] => 2017-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3264 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15836262 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/836262
EMI SHIELDING FOR DISCRETE INTEGRATED CIRCUIT PACKAGES Dec 7, 2017 Abandoned
Array ( [id] => 16386600 [patent_doc_number] => 10811445 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-20 [patent_title] => Semiconductor device, method of manufacturing semiconductor device, and display unit [patent_app_type] => utility [patent_app_number] => 15/830503 [patent_app_country] => US [patent_app_date] => 2017-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 10212 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15830503 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/830503
Semiconductor device, method of manufacturing semiconductor device, and display unit Dec 3, 2017 Issued
Array ( [id] => 16293660 [patent_doc_number] => 10770515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-08 [patent_title] => Display device including color filters [patent_app_type] => utility [patent_app_number] => 15/831060 [patent_app_country] => US [patent_app_date] => 2017-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 7034 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15831060 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/831060
Display device including color filters Dec 3, 2017 Issued
Array ( [id] => 12595503 [patent_doc_number] => 20180090331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-29 [patent_title] => METHOD OF MANUFACTURING WAFER LEVEL CHIP SCALE PACKAGE [patent_app_type] => utility [patent_app_number] => 15/830621 [patent_app_country] => US [patent_app_date] => 2017-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11010 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15830621 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/830621
Method of manufacturing wafer level chip scale package Dec 3, 2017 Issued
Array ( [id] => 12716686 [patent_doc_number] => 20180130728 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-10 [patent_title] => SILICON SUBSTRATE PROCESSING METHOD, ELEMENT EMBEDDED SUBSTRATE, AND CHANNEL FORMING SUBSTRATE [patent_app_type] => utility [patent_app_number] => 15/791152 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11267 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15791152 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/791152
SILICON SUBSTRATE PROCESSING METHOD, ELEMENT EMBEDDED SUBSTRATE, AND CHANNEL FORMING SUBSTRATE Oct 22, 2017 Abandoned
Array ( [id] => 15637597 [patent_doc_number] => 10591787 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-17 [patent_title] => Display device having an auxiliary electrode [patent_app_type] => utility [patent_app_number] => 15/791179 [patent_app_country] => US [patent_app_date] => 2017-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 8810 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15791179 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/791179
Display device having an auxiliary electrode Oct 22, 2017 Issued
Array ( [id] => 12693145 [patent_doc_number] => 20180122881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => ELECTROLUMINESCENCE DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 15/789836 [patent_app_country] => US [patent_app_date] => 2017-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10427 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15789836 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/789836
Electroluminescence display device Oct 19, 2017 Issued
Array ( [id] => 12668968 [patent_doc_number] => 20180114822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-26 [patent_title] => FLEXIBLE DISPLAY [patent_app_type] => utility [patent_app_number] => 15/789036 [patent_app_country] => US [patent_app_date] => 2017-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5948 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15789036 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/789036
Flexible display Oct 19, 2017 Issued
Array ( [id] => 12897277 [patent_doc_number] => 20180190934 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-05 [patent_title] => Display Device Having an Auxiliary Electrode [patent_app_type] => utility [patent_app_number] => 15/788737 [patent_app_country] => US [patent_app_date] => 2017-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10894 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15788737 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/788737
Display device having an auxiliary electrode Oct 18, 2017 Issued
Array ( [id] => 16803484 [patent_doc_number] => 10998441 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Strained silicon complementary metal oxide semiconductor including a silicon containing tensile n-type fin field effect transistor and silicon containing compressive p-type fin field effect transistor formed using a dual relaxed substrate [patent_app_type] => utility [patent_app_number] => 15/786037 [patent_app_country] => US [patent_app_date] => 2017-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 8670 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15786037 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/786037
Strained silicon complementary metal oxide semiconductor including a silicon containing tensile n-type fin field effect transistor and silicon containing compressive p-type fin field effect transistor formed using a dual relaxed substrate Oct 16, 2017 Issued
Array ( [id] => 12669331 [patent_doc_number] => 20180114943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-26 [patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/784539 [patent_app_country] => US [patent_app_date] => 2017-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7160 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15784539 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/784539
DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME Oct 15, 2017 Abandoned
Array ( [id] => 12651066 [patent_doc_number] => 20180108853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 15/782139 [patent_app_country] => US [patent_app_date] => 2017-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5209 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15782139 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/782139
DISPLAY DEVICE Oct 11, 2017 Abandoned
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