
Amanda Karen Gurski
Examiner (ID: 11324, Phone: (571)270-5961 , Office: P/3623 )
| Most Active Art Unit | 3623 |
| Art Unit(s) | 3624, 3683, 3623, 3625 |
| Total Applications | 441 |
| Issued Applications | 121 |
| Pending Applications | 64 |
| Abandoned Applications | 268 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4986386
[patent_doc_number] => 20070152724
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-05
[patent_title] => 'Reset circuit and electrical device with the reset circuit providing a reset signal during power changing status'
[patent_app_type] => utility
[patent_app_number] => 11/437723
[patent_app_country] => US
[patent_app_date] => 2006-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2066
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0152/20070152724.pdf
[firstpage_image] =>[orig_patent_app_number] => 11437723
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/437723 | Reset circuit and electrical device with the reset circuit providing a reset signal during power changing status | May 21, 2006 | Abandoned |
Array
(
[id] => 163622
[patent_doc_number] => 07671661
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-02
[patent_title] => 'Integrated circuit and method for automatically tuning process and temperature variations'
[patent_app_type] => utility
[patent_app_number] => 11/437649
[patent_app_country] => US
[patent_app_date] => 2006-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 4615
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/671/07671661.pdf
[firstpage_image] =>[orig_patent_app_number] => 11437649
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/437649 | Integrated circuit and method for automatically tuning process and temperature variations | May 21, 2006 | Issued |
Array
(
[id] => 5202639
[patent_doc_number] => 20070024118
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-01
[patent_title] => 'Monolithically integrated power IGBT device'
[patent_app_type] => utility
[patent_app_number] => 11/438680
[patent_app_country] => US
[patent_app_date] => 2006-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 3125
[patent_no_of_claims] => 20
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[pdf_file] => publications/A1/0024/20070024118.pdf
[firstpage_image] =>[orig_patent_app_number] => 11438680
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/438680 | Monolithically integrated power IGBT device | May 21, 2006 | Abandoned |
Array
(
[id] => 5605995
[patent_doc_number] => 20060267511
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-30
[patent_title] => 'Start-Up Supervision Circuit'
[patent_app_type] => utility
[patent_app_number] => 11/380323
[patent_app_country] => US
[patent_app_date] => 2006-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2366
[patent_no_of_claims] => 13
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[firstpage_image] =>[orig_patent_app_number] => 11380323
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/380323 | Start-Up Supervision Circuit | Apr 25, 2006 | Abandoned |
Array
(
[id] => 5192889
[patent_doc_number] => 20070081371
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-12
[patent_title] => 'Synchronous Rectifier Control Circuits'
[patent_app_type] => utility
[patent_app_number] => 11/379820
[patent_app_country] => US
[patent_app_date] => 2006-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 3360
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[pdf_file] => publications/A1/0081/20070081371.pdf
[firstpage_image] =>[orig_patent_app_number] => 11379820
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/379820 | Synchronous Rectifier Control Circuits | Apr 23, 2006 | Abandoned |
Array
(
[id] => 5223356
[patent_doc_number] => 20070252622
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-11-01
[patent_title] => 'A System for Threshold Reference Voltage Compensation in Pseudo-Differential Signaling'
[patent_app_type] => utility
[patent_app_number] => 11/279627
[patent_app_country] => US
[patent_app_date] => 2006-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3423
[patent_no_of_claims] => 20
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0252/20070252622.pdf
[firstpage_image] =>[orig_patent_app_number] => 11279627
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/279627 | A System for Threshold Reference Voltage Compensation in Pseudo-Differential Signaling | Apr 12, 2006 | Abandoned |
Array
(
[id] => 5780697
[patent_doc_number] => 20060202731
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-14
[patent_title] => 'Semiconductor integrated circuit device'
[patent_app_type] => utility
[patent_app_number] => 11/371043
[patent_app_country] => US
[patent_app_date] => 2006-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 49
[patent_figures_cnt] => 49
[patent_no_of_words] => 52428
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 11
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0202/20060202731.pdf
[firstpage_image] =>[orig_patent_app_number] => 11371043
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/371043 | Semiconductor integrated circuit device | Mar 8, 2006 | Abandoned |
Array
(
[id] => 814181
[patent_doc_number] => 07414458
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-08-19
[patent_title] => 'Power gating circuit of a signal processing system'
[patent_app_type] => utility
[patent_app_number] => 11/308151
[patent_app_country] => US
[patent_app_date] => 2006-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1615
[patent_no_of_claims] => 7
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/414/07414458.pdf
[firstpage_image] =>[orig_patent_app_number] => 11308151
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/308151 | Power gating circuit of a signal processing system | Mar 7, 2006 | Issued |
Array
(
[id] => 5681314
[patent_doc_number] => 20060197581
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-07
[patent_title] => 'Temperature detecting circuit'
[patent_app_type] => utility
[patent_app_number] => 11/370273
[patent_app_country] => US
[patent_app_date] => 2006-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[patent_no_of_words] => 12846
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[pdf_file] => publications/A1/0197/20060197581.pdf
[firstpage_image] =>[orig_patent_app_number] => 11370273
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/370273 | Temperature detecting circuit | Mar 5, 2006 | Abandoned |
Array
(
[id] => 5129420
[patent_doc_number] => 20070205817
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-06
[patent_title] => 'Method, circuit and system for detecting a locked state of a clock synchronization circuit'
[patent_app_type] => utility
[patent_app_number] => 11/367914
[patent_app_country] => US
[patent_app_date] => 2006-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5611
[patent_no_of_claims] => 29
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0205/20070205817.pdf
[firstpage_image] =>[orig_patent_app_number] => 11367914
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/367914 | Method, circuit and system for detecting a locked state of a clock synchronization circuit | Mar 2, 2006 | Abandoned |
Array
(
[id] => 9255449
[patent_doc_number] => 08618872
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-12-31
[patent_title] => 'Filter with controlled cut-off frequency step-down'
[patent_app_type] => utility
[patent_app_number] => 11/367777
[patent_app_country] => US
[patent_app_date] => 2006-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
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[patent_no_of_words] => 6493
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11367777
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/367777 | Filter with controlled cut-off frequency step-down | Mar 2, 2006 | Issued |
Array
(
[id] => 5780738
[patent_doc_number] => 20060202745
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-14
[patent_title] => 'Reference voltage generating circuit and reference current generating circuit'
[patent_app_type] => utility
[patent_app_number] => 11/366745
[patent_app_country] => US
[patent_app_date] => 2006-03-03
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0202/20060202745.pdf
[firstpage_image] =>[orig_patent_app_number] => 11366745
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/366745 | Reference voltage generating circuit and reference current generating circuit | Mar 2, 2006 | Abandoned |
Array
(
[id] => 5832672
[patent_doc_number] => 20060244502
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-02
[patent_title] => 'Sense amplifier-based flip-flop circuit'
[patent_app_type] => utility
[patent_app_number] => 11/364003
[patent_app_country] => US
[patent_app_date] => 2006-03-01
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[pdf_file] => publications/A1/0244/20060244502.pdf
[firstpage_image] =>[orig_patent_app_number] => 11364003
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/364003 | Sense amplifier-based flip-flop circuit | Feb 28, 2006 | Abandoned |
Array
(
[id] => 830632
[patent_doc_number] => 07400188
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-07-15
[patent_title] => 'Voltage providing circuit'
[patent_app_type] => utility
[patent_app_number] => 11/365640
[patent_app_country] => US
[patent_app_date] => 2006-02-28
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/400/07400188.pdf
[firstpage_image] =>[orig_patent_app_number] => 11365640
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/365640 | Voltage providing circuit | Feb 27, 2006 | Issued |
Array
(
[id] => 5751019
[patent_doc_number] => 20060220168
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-10-05
[patent_title] => 'Shielding high voltage integrated circuits'
[patent_app_type] => utility
[patent_app_number] => 11/364120
[patent_app_country] => US
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[pdf_file] => publications/A1/0220/20060220168.pdf
[firstpage_image] =>[orig_patent_app_number] => 11364120
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/364120 | Shielding high voltage integrated circuits | Feb 27, 2006 | Abandoned |
Array
(
[id] => 225451
[patent_doc_number] => 07605637
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-10-20
[patent_title] => 'Voltage multiplier and relative operating method'
[patent_app_type] => utility
[patent_app_number] => 11/364859
[patent_app_country] => US
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/605/07605637.pdf
[firstpage_image] =>[orig_patent_app_number] => 11364859
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/364859 | Voltage multiplier and relative operating method | Feb 26, 2006 | Issued |
Array
(
[id] => 5175608
[patent_doc_number] => 20070176666
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-08-02
[patent_title] => 'Level translator for adapting a signal to a voltage level'
[patent_app_type] => utility
[patent_app_number] => 11/341383
[patent_app_country] => US
[patent_app_date] => 2006-01-30
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[pdf_file] => publications/A1/0176/20070176666.pdf
[firstpage_image] =>[orig_patent_app_number] => 11341383
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/341383 | Level translator for adapting a signal to a voltage level | Jan 29, 2006 | Abandoned |
Array
(
[id] => 5670731
[patent_doc_number] => 20060176085
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-10
[patent_title] => 'Comparator circuit with reduced switching noise'
[patent_app_type] => utility
[patent_app_number] => 11/340555
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[firstpage_image] =>[orig_patent_app_number] => 11340555
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/340555 | Comparator circuit with reduced switching noise | Jan 26, 2006 | Issued |
Array
(
[id] => 827380
[patent_doc_number] => 07403051
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2008-07-22
[patent_title] => 'Determining voltage level validity for a power-on reset condition'
[patent_app_type] => utility
[patent_app_number] => 11/340389
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[pdf_file] => patents/07/403/07403051.pdf
[firstpage_image] =>[orig_patent_app_number] => 11340389
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/340389 | Determining voltage level validity for a power-on reset condition | Jan 25, 2006 | Issued |
Array
(
[id] => 5617403
[patent_doc_number] => 20060186935
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-24
[patent_title] => 'Circuit and method for generating boost element drive signals for semiconductor memory devices with mode register set signals'
[patent_app_type] => utility
[patent_app_number] => 11/338287
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[pdf_file] => publications/A1/0186/20060186935.pdf
[firstpage_image] =>[orig_patent_app_number] => 11338287
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/338287 | Circuit and method for generating boost element drive signals for semiconductor memory devices with mode register set signals | Jan 23, 2006 | Abandoned |