Search

Amanda Karen Gurski

Examiner (ID: 11324, Phone: (571)270-5961 , Office: P/3623 )

Most Active Art Unit
3623
Art Unit(s)
3624, 3683, 3623, 3625
Total Applications
441
Issued Applications
121
Pending Applications
64
Abandoned Applications
268

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 904772 [patent_doc_number] => 07336118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-26 [patent_title] => 'Inverter apparatus' [patent_app_type] => utility [patent_app_number] => 11/191023 [patent_app_country] => US [patent_app_date] => 2005-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4455 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/336/07336118.pdf [firstpage_image] =>[orig_patent_app_number] => 11191023 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/191023
Inverter apparatus Jul 27, 2005 Issued
Array ( [id] => 5202853 [patent_doc_number] => 20070024332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-01 [patent_title] => 'All MOS power-on-reset circuit' [patent_app_type] => utility [patent_app_number] => 11/192152 [patent_app_country] => US [patent_app_date] => 2005-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2712 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20070024332.pdf [firstpage_image] =>[orig_patent_app_number] => 11192152 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/192152
All MOS power-on-reset circuit Jul 27, 2005 Abandoned
Array ( [id] => 5909848 [patent_doc_number] => 20060125547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-15 [patent_title] => 'Adjustable and programmable temperature coefficient-proportional to absolute temperature (APTC-PTAT) circuit' [patent_app_type] => utility [patent_app_number] => 11/190441 [patent_app_country] => US [patent_app_date] => 2005-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4584 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20060125547.pdf [firstpage_image] =>[orig_patent_app_number] => 11190441 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/190441
Adjustable and programmable temperature coefficient-proportional to absolute temperature (APTC-PTAT) circuit Jul 26, 2005 Abandoned
Array ( [id] => 419283 [patent_doc_number] => 07276960 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-02 [patent_title] => 'Voltage regulated charge pump with regulated charge current into the flying capacitor' [patent_app_type] => utility [patent_app_number] => 11/190630 [patent_app_country] => US [patent_app_date] => 2005-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2559 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/276/07276960.pdf [firstpage_image] =>[orig_patent_app_number] => 11190630 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/190630
Voltage regulated charge pump with regulated charge current into the flying capacitor Jul 26, 2005 Issued
Array ( [id] => 7595027 [patent_doc_number] => 07626435 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-01 [patent_title] => 'High resolution delay line architecture' [patent_app_type] => utility [patent_app_number] => 11/191110 [patent_app_country] => US [patent_app_date] => 2005-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3049 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/626/07626435.pdf [firstpage_image] =>[orig_patent_app_number] => 11191110 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/191110
High resolution delay line architecture Jul 26, 2005 Issued
Array ( [id] => 5863642 [patent_doc_number] => 20060097772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-11 [patent_title] => 'Charge pump circuit' [patent_app_type] => utility [patent_app_number] => 11/188855 [patent_app_country] => US [patent_app_date] => 2005-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5894 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20060097772.pdf [firstpage_image] =>[orig_patent_app_number] => 11188855 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/188855
Charge pump circuit Jul 25, 2005 Issued
Array ( [id] => 865932 [patent_doc_number] => 07368972 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-06 [patent_title] => 'Power transistor control device' [patent_app_type] => utility [patent_app_number] => 11/188843 [patent_app_country] => US [patent_app_date] => 2005-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5057 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/368/07368972.pdf [firstpage_image] =>[orig_patent_app_number] => 11188843 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/188843
Power transistor control device Jul 25, 2005 Issued
Array ( [id] => 5818413 [patent_doc_number] => 20060022726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Method of switching PLL characteristics and PLL circuit' [patent_app_type] => utility [patent_app_number] => 11/189115 [patent_app_country] => US [patent_app_date] => 2005-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8597 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20060022726.pdf [firstpage_image] =>[orig_patent_app_number] => 11189115 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/189115
Method of switching PLL characteristics and PLL circuit Jul 25, 2005 Issued
Array ( [id] => 5917809 [patent_doc_number] => 20060238231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-26 [patent_title] => 'Pulse signal generator device' [patent_app_type] => utility [patent_app_number] => 11/188902 [patent_app_country] => US [patent_app_date] => 2005-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8080 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0238/20060238231.pdf [firstpage_image] =>[orig_patent_app_number] => 11188902 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/188902
Pulse signal generator device Jul 25, 2005 Abandoned
Array ( [id] => 5818404 [patent_doc_number] => 20060022717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Circuit and method for detecting phase' [patent_app_type] => utility [patent_app_number] => 11/188952 [patent_app_country] => US [patent_app_date] => 2005-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6118 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20060022717.pdf [firstpage_image] =>[orig_patent_app_number] => 11188952 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/188952
Circuit and method for detecting phase Jul 24, 2005 Issued
Array ( [id] => 5818414 [patent_doc_number] => 20060022727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Charge pump with balanced and constant up and down currents' [patent_app_type] => utility [patent_app_number] => 11/188833 [patent_app_country] => US [patent_app_date] => 2005-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4923 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20060022727.pdf [firstpage_image] =>[orig_patent_app_number] => 11188833 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/188833
Charge pump with balanced and constant up and down currents Jul 24, 2005 Issued
Array ( [id] => 857719 [patent_doc_number] => 07375559 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-05-20 [patent_title] => 'Differential comparator with a replica input stage to set the accurate bias current for improved common mode rejection' [patent_app_type] => utility [patent_app_number] => 11/176998 [patent_app_country] => US [patent_app_date] => 2005-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4203 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/375/07375559.pdf [firstpage_image] =>[orig_patent_app_number] => 11176998 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/176998
Differential comparator with a replica input stage to set the accurate bias current for improved common mode rejection Jul 6, 2005 Issued
Array ( [id] => 5832821 [patent_doc_number] => 20060244651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-02 [patent_title] => 'Current source generator utilizing a portion of a targeted analog circuit' [patent_app_type] => utility [patent_app_number] => 11/119288 [patent_app_country] => US [patent_app_date] => 2005-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7080 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0244/20060244651.pdf [firstpage_image] =>[orig_patent_app_number] => 11119288 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/119288
Current source generator utilizing a portion of a targeted analog circuit Apr 28, 2005 Issued
Array ( [id] => 6965132 [patent_doc_number] => 20050232029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-20 [patent_title] => 'Write pulse generation for recording on optical media' [patent_app_type] => utility [patent_app_number] => 11/106013 [patent_app_country] => US [patent_app_date] => 2005-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1688 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20050232029.pdf [firstpage_image] =>[orig_patent_app_number] => 11106013 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/106013
Write pulse generation for recording on optical media Apr 12, 2005 Abandoned
Array ( [id] => 5892918 [patent_doc_number] => 20060001456 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-05 [patent_title] => 'Low voltage driver' [patent_app_type] => utility [patent_app_number] => 11/083078 [patent_app_country] => US [patent_app_date] => 2005-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3337 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20060001456.pdf [firstpage_image] =>[orig_patent_app_number] => 11083078 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/083078
Low voltage driver Mar 16, 2005 Abandoned
Array ( [id] => 356733 [patent_doc_number] => 07489173 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-02-10 [patent_title] => 'Signal adjustment for duty cycle control' [patent_app_type] => utility [patent_app_number] => 11/061697 [patent_app_country] => US [patent_app_date] => 2005-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5759 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/489/07489173.pdf [firstpage_image] =>[orig_patent_app_number] => 11061697 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/061697
Signal adjustment for duty cycle control Feb 17, 2005 Issued
Array ( [id] => 440530 [patent_doc_number] => 07259596 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-21 [patent_title] => 'Circuit arrangement for monitoring a voltage' [patent_app_type] => utility [patent_app_number] => 10/980212 [patent_app_country] => US [patent_app_date] => 2004-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3997 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/259/07259596.pdf [firstpage_image] =>[orig_patent_app_number] => 10980212 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/980212
Circuit arrangement for monitoring a voltage Nov 1, 2004 Issued
Array ( [id] => 196794 [patent_doc_number] => 07635996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-22 [patent_title] => 'Differential blocking sampler, in particular for an analog digital converter' [patent_app_type] => utility [patent_app_number] => 10/570322 [patent_app_country] => US [patent_app_date] => 2004-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5544 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/635/07635996.pdf [firstpage_image] =>[orig_patent_app_number] => 10570322 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/570322
Differential blocking sampler, in particular for an analog digital converter Oct 14, 2004 Issued
Array ( [id] => 5724886 [patent_doc_number] => 20060055646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-16 [patent_title] => 'Latch-based serial port output buffer' [patent_app_type] => utility [patent_app_number] => 10/942219 [patent_app_country] => US [patent_app_date] => 2004-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6683 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20060055646.pdf [firstpage_image] =>[orig_patent_app_number] => 10942219 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/942219
Latch-based serial port output buffer Sep 15, 2004 Issued
Array ( [id] => 5692139 [patent_doc_number] => 20060152284 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-13 [patent_title] => 'Semiconductor device with high-breakdown-voltage regulator' [patent_app_type] => utility [patent_app_number] => 10/563120 [patent_app_country] => US [patent_app_date] => 2004-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5222 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20060152284.pdf [firstpage_image] =>[orig_patent_app_number] => 10563120 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/563120
Semiconductor device with high-breakdown-voltage regulator Jun 30, 2004 Abandoned
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