Search

Amanda Lee Bailey

Examiner (ID: 3862)

Most Active Art Unit
3673
Art Unit(s)
3673
Total Applications
484
Issued Applications
252
Pending Applications
47
Abandoned Applications
193

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8534739 [patent_doc_number] => 08310898 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-13 [patent_title] => 'Semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 12/885253 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 21 [patent_no_of_words] => 9780 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12885253 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/885253
Semiconductor storage device Sep 16, 2010 Issued
Array ( [id] => 8423179 [patent_doc_number] => 08279670 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-02 [patent_title] => 'Non-volatile semiconductor storage device' [patent_app_type] => utility [patent_app_number] => 12/882507 [patent_app_country] => US [patent_app_date] => 2010-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 6605 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12882507 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/882507
Non-volatile semiconductor storage device Sep 14, 2010 Issued
Array ( [id] => 6133159 [patent_doc_number] => 20110007589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'Integrated circuits and methods to compensate for defective non-volatile embedded memory in one or more layers of vertically stacked non-volatile embedded memory' [patent_app_type] => utility [patent_app_number] => 12/807836 [patent_app_country] => US [patent_app_date] => 2010-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7425 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20110007589.pdf [firstpage_image] =>[orig_patent_app_number] => 12807836 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/807836
Integrated circuits and methods to compensate for defective non-volatile embedded memory in one or more layers of vertically stacked non-volatile embedded memory Sep 13, 2010 Issued
Array ( [id] => 6117781 [patent_doc_number] => 20110075501 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'Multi-Channel Semiconductor Integrated Circuit Devices for Controlling Direct Current Generators and Memory Systems Including the Same' [patent_app_type] => utility [patent_app_number] => 12/878431 [patent_app_country] => US [patent_app_date] => 2010-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5779 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20110075501.pdf [firstpage_image] =>[orig_patent_app_number] => 12878431 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/878431
Multi-channel semiconductor integrated circuit devices for controlling direct current generators and memory systems including the same Sep 8, 2010 Issued
Array ( [id] => 6337475 [patent_doc_number] => 20100329009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'SMART CARD CAPABLE OF SENSING LIGHT' [patent_app_type] => utility [patent_app_number] => 12/877539 [patent_app_country] => US [patent_app_date] => 2010-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4365 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0329/20100329009.pdf [firstpage_image] =>[orig_patent_app_number] => 12877539 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/877539
Smart card capable of sensing light Sep 7, 2010 Issued
Array ( [id] => 9415211 [patent_doc_number] => 08699256 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-15 [patent_title] => 'Semiconductor device having nonvolatile memory elements' [patent_app_type] => utility [patent_app_number] => 12/923165 [patent_app_country] => US [patent_app_date] => 2010-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6660 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12923165 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/923165
Semiconductor device having nonvolatile memory elements Sep 6, 2010 Issued
Array ( [id] => 8910914 [patent_doc_number] => 08482987 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-09 [patent_title] => 'Method and apparatus for the erase suspend operation' [patent_app_type] => utility [patent_app_number] => 12/875003 [patent_app_country] => US [patent_app_date] => 2010-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2694 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12875003 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/875003
Method and apparatus for the erase suspend operation Sep 1, 2010 Issued
Array ( [id] => 6023175 [patent_doc_number] => 20110051501 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'MEMORY CONTROL WITH SELECTIVE RETENTION' [patent_app_type] => utility [patent_app_number] => 12/871834 [patent_app_country] => US [patent_app_date] => 2010-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3530 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20110051501.pdf [firstpage_image] =>[orig_patent_app_number] => 12871834 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/871834
Memory control with selective retention Aug 29, 2010 Issued
Array ( [id] => 6201103 [patent_doc_number] => 20110063889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-17 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/869049 [patent_app_country] => US [patent_app_date] => 2010-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9201 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20110063889.pdf [firstpage_image] =>[orig_patent_app_number] => 12869049 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/869049
Semiconductor storage device Aug 25, 2010 Issued
Array ( [id] => 9678591 [patent_doc_number] => 08817511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'PCB circuit modification from multiple to individual chip enable signals' [patent_app_type] => utility [patent_app_number] => 12/857365 [patent_app_country] => US [patent_app_date] => 2010-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 7192 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12857365 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/857365
PCB circuit modification from multiple to individual chip enable signals Aug 15, 2010 Issued
Array ( [id] => 7774904 [patent_doc_number] => 20120039143 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-16 [patent_title] => 'SENSE AMPLIFIER WITH ADJUSTABLE BACK BIAS' [patent_app_type] => utility [patent_app_number] => 12/855289 [patent_app_country] => US [patent_app_date] => 2010-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4122 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20120039143.pdf [firstpage_image] =>[orig_patent_app_number] => 12855289 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/855289
Sense amplifier with adjustable back bias Aug 11, 2010 Issued
Array ( [id] => 8832510 [patent_doc_number] => RE044242 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2013-05-28 [patent_title] => 'Semiconductor memory' [patent_app_type] => reissue [patent_app_number] => 12/846450 [patent_app_country] => US [patent_app_date] => 2010-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 17649 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12846450 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/846450
Semiconductor memory Jul 28, 2010 Issued
Array ( [id] => 7752850 [patent_doc_number] => 20120026786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'WRITE OPERATION FOR PHASE CHANGE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/846775 [patent_app_country] => US [patent_app_date] => 2010-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4451 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20120026786.pdf [firstpage_image] =>[orig_patent_app_number] => 12846775 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/846775
Write operation for phase change memory Jul 28, 2010 Issued
Array ( [id] => 6044849 [patent_doc_number] => 20110205819 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'REDUNDANCY DATA STORAGE CIRCUIT, REDUNDANCY DATA CONTROL METHOD AND REPAIR DETERMINATION CIRCUIT OF SEMICONDUCTOR MEMORY' [patent_app_type] => utility [patent_app_number] => 12/845237 [patent_app_country] => US [patent_app_date] => 2010-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3142 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20110205819.pdf [firstpage_image] =>[orig_patent_app_number] => 12845237 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/845237
REDUNDANCY DATA STORAGE CIRCUIT, REDUNDANCY DATA CONTROL METHOD AND REPAIR DETERMINATION CIRCUIT OF SEMICONDUCTOR MEMORY Jul 27, 2010 Abandoned
Array ( [id] => 7653176 [patent_doc_number] => 20110302445 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-08 [patent_title] => 'SELECTIVE RETIREMENT OF BLOCKS' [patent_app_type] => utility [patent_app_number] => 12/842477 [patent_app_country] => US [patent_app_date] => 2010-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6581 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0302/20110302445.pdf [firstpage_image] =>[orig_patent_app_number] => 12842477 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/842477
Selective retirement of blocks Jul 22, 2010 Issued
Array ( [id] => 6157404 [patent_doc_number] => 20110158013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'FUSE SET OF SEMICONDUCTOR MEMORY AND REPAIR DETERMINATION CIRCUIT USING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/840245 [patent_app_country] => US [patent_app_date] => 2010-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3542 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20110158013.pdf [firstpage_image] =>[orig_patent_app_number] => 12840245 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/840245
FUSE SET OF SEMICONDUCTOR MEMORY AND REPAIR DETERMINATION CIRCUIT USING THE SAME Jul 19, 2010 Abandoned
Array ( [id] => 6100959 [patent_doc_number] => 20110164451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-07 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING PROGRAMMABLE FUSE' [patent_app_type] => utility [patent_app_number] => 12/836461 [patent_app_country] => US [patent_app_date] => 2010-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1417 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20110164451.pdf [firstpage_image] =>[orig_patent_app_number] => 12836461 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/836461
SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING PROGRAMMABLE FUSE Jul 13, 2010 Abandoned
Array ( [id] => 8644162 [patent_doc_number] => 08369156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-05 [patent_title] => 'Fast random access to non-volatile storage' [patent_app_type] => utility [patent_app_number] => 12/835315 [patent_app_country] => US [patent_app_date] => 2010-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 15926 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12835315 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/835315
Fast random access to non-volatile storage Jul 12, 2010 Issued
Array ( [id] => 6133160 [patent_doc_number] => 20110007590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-01-13 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE AND METHOD OF CONTROLLING WORD LINE POTENTIAL' [patent_app_type] => utility [patent_app_number] => 12/834781 [patent_app_country] => US [patent_app_date] => 2010-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7224 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20110007590.pdf [firstpage_image] =>[orig_patent_app_number] => 12834781 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/834781
SEMICONDUCTOR STORAGE DEVICE AND METHOD OF CONTROLLING WORD LINE POTENTIAL Jul 11, 2010 Abandoned
Array ( [id] => 8871879 [patent_doc_number] => 08467261 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-18 [patent_title] => 'Implementing smart switched decoupling capacitors to efficiently reduce power supply noise' [patent_app_type] => utility [patent_app_number] => 12/833105 [patent_app_country] => US [patent_app_date] => 2010-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2625 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12833105 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/833105
Implementing smart switched decoupling capacitors to efficiently reduce power supply noise Jul 8, 2010 Issued
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