Search

Amanda Lee Bailey

Examiner (ID: 3862)

Most Active Art Unit
3673
Art Unit(s)
3673
Total Applications
484
Issued Applications
252
Pending Applications
47
Abandoned Applications
193

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6233440 [patent_doc_number] => 20100265771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-21 [patent_title] => 'METHOD OF PROGRAMMING MEMORY CELLS OF SERIES STRINGS OF MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 12/829885 [patent_app_country] => US [patent_app_date] => 2010-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8587 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20100265771.pdf [firstpage_image] =>[orig_patent_app_number] => 12829885 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/829885
Method of programming memory cells of series strings of memory cells Jul 1, 2010 Issued
Array ( [id] => 6337456 [patent_doc_number] => 20100329005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND PROGRAMMING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/827077 [patent_app_country] => US [patent_app_date] => 2010-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5467 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0329/20100329005.pdf [firstpage_image] =>[orig_patent_app_number] => 12827077 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/827077
Semiconductor memory device and programming method thereof Jun 29, 2010 Issued
Array ( [id] => 8761775 [patent_doc_number] => 08422305 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-16 [patent_title] => 'Method of programming nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 12/826123 [patent_app_country] => US [patent_app_date] => 2010-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4354 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12826123 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/826123
Method of programming nonvolatile memory device Jun 28, 2010 Issued
Array ( [id] => 8544906 [patent_doc_number] => 08320204 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-27 [patent_title] => 'Memory interface control circuit' [patent_app_type] => utility [patent_app_number] => 12/824745 [patent_app_country] => US [patent_app_date] => 2010-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4806 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12824745 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/824745
Memory interface control circuit Jun 27, 2010 Issued
Array ( [id] => 6337520 [patent_doc_number] => 20100329017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'SEMICONDUCTOR DEVICE FOR SHORT-CIRCUITING OUTPUT TERMINALS OF TWO OR MORE VOLTAGE GENERATOR CIRCUITS AT READ TIME AND CONTROL METHOD FOR THE SAME' [patent_app_type] => utility [patent_app_number] => 12/822587 [patent_app_country] => US [patent_app_date] => 2010-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10410 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0329/20100329017.pdf [firstpage_image] =>[orig_patent_app_number] => 12822587 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/822587
Semiconductor device for short-circuiting output terminals of two or more voltage generator circuits at read time and control method for the same Jun 23, 2010 Issued
Array ( [id] => 7528783 [patent_doc_number] => 08045386 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-25 [patent_title] => 'Methods and apparatus for programming a memory cell using one or more blocking memory cells' [patent_app_type] => utility [patent_app_number] => 12/820430 [patent_app_country] => US [patent_app_date] => 2010-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9065 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/045/08045386.pdf [firstpage_image] =>[orig_patent_app_number] => 12820430 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/820430
Methods and apparatus for programming a memory cell using one or more blocking memory cells Jun 21, 2010 Issued
Array ( [id] => 6588372 [patent_doc_number] => 20100322009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-23 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE INCLUDING CHARGE ACCUMULATION LAYER' [patent_app_type] => utility [patent_app_number] => 12/817665 [patent_app_country] => US [patent_app_date] => 2010-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 12052 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0322/20100322009.pdf [firstpage_image] =>[orig_patent_app_number] => 12817665 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/817665
Semiconductor memory device including charge accumulation layer Jun 16, 2010 Issued
Array ( [id] => 9114633 [patent_doc_number] => 08570818 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-29 [patent_title] => 'Address multiplexing in pseudo-dual port memory' [patent_app_type] => utility [patent_app_number] => 12/814682 [patent_app_country] => US [patent_app_date] => 2010-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4132 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12814682 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/814682
Address multiplexing in pseudo-dual port memory Jun 13, 2010 Issued
Array ( [id] => 8550641 [patent_doc_number] => 08325529 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-04 [patent_title] => 'Bit-line connections for non-volatile storage' [patent_app_type] => utility [patent_app_number] => 12/813437 [patent_app_country] => US [patent_app_date] => 2010-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 9445 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12813437 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/813437
Bit-line connections for non-volatile storage Jun 9, 2010 Issued
Array ( [id] => 6379113 [patent_doc_number] => 20100301949 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'INTERNAL POWER SUPPLY CIRCUIT, SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/787023 [patent_app_country] => US [patent_app_date] => 2010-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9216 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0301/20100301949.pdf [firstpage_image] =>[orig_patent_app_number] => 12787023 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/787023
Internal power supply circuit, semiconductor device, and manufacturing method of semiconductor device May 24, 2010 Issued
Array ( [id] => 6627978 [patent_doc_number] => 20100226175 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-09 [patent_title] => 'MEMORY DEVICES AND METHODS OF WRITING DATA TO MEMORY DEVICES UTILIZING ANALOG VOLTAGE LEVELS' [patent_app_type] => utility [patent_app_number] => 12/782290 [patent_app_country] => US [patent_app_date] => 2010-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6499 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20100226175.pdf [firstpage_image] =>[orig_patent_app_number] => 12782290 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/782290
Memory devices and methods of writing data to memory devices utilizing analog voltage levels May 17, 2010 Issued
Array ( [id] => 10852605 [patent_doc_number] => 08879300 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-04 [patent_title] => 'Switchable two-terminal devices with diffusion/drift species' [patent_app_type] => utility [patent_app_number] => 13/384853 [patent_app_country] => US [patent_app_date] => 2010-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 7404 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13384853 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/384853
Switchable two-terminal devices with diffusion/drift species Apr 21, 2010 Issued
Array ( [id] => 7802287 [patent_doc_number] => 08130563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-06 [patent_title] => 'Computer apparatus and memory error signal detecting system' [patent_app_type] => utility [patent_app_number] => 12/759345 [patent_app_country] => US [patent_app_date] => 2010-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3053 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/130/08130563.pdf [firstpage_image] =>[orig_patent_app_number] => 12759345 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/759345
Computer apparatus and memory error signal detecting system Apr 12, 2010 Issued
Array ( [id] => 6233405 [patent_doc_number] => 20100265757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-21 [patent_title] => 'RESISTANCE CHANGE MEMORY DEVICE AND OPERATION METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 12/755823 [patent_app_country] => US [patent_app_date] => 2010-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9613 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0265/20100265757.pdf [firstpage_image] =>[orig_patent_app_number] => 12755823 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/755823
Resistance change memory device and operation method of the same Apr 6, 2010 Issued
Array ( [id] => 6391000 [patent_doc_number] => 20100177586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-15 [patent_title] => 'MEMORY ARCHITECTURE HAVING MULTIPLE PARTIAL WORDLINE DRIVERS AND CONTACTED AND FEED-THROUGH BITLINES' [patent_app_type] => utility [patent_app_number] => 12/730873 [patent_app_country] => US [patent_app_date] => 2010-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5577 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20100177586.pdf [firstpage_image] =>[orig_patent_app_number] => 12730873 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/730873
Memory architecture having multiple partial wordline drivers and contacted and feed-through bitlines Mar 23, 2010 Issued
Array ( [id] => 8760464 [patent_doc_number] => 08420986 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-16 [patent_title] => 'Frequency-modulated electric element control' [patent_app_type] => utility [patent_app_number] => 12/719878 [patent_app_country] => US [patent_app_date] => 2010-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3616 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12719878 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/719878
Frequency-modulated electric element control Mar 8, 2010 Issued
Array ( [id] => 6093856 [patent_doc_number] => 20110219182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-08 [patent_title] => 'SYSTEM AND METHOD FOR MANAGING SELF-REFRESH IN A MULTI-RANK MEMORY' [patent_app_type] => utility [patent_app_number] => 12/719795 [patent_app_country] => US [patent_app_date] => 2010-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3119 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0219/20110219182.pdf [firstpage_image] =>[orig_patent_app_number] => 12719795 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/719795
System and method for managing self-refresh in a multi-rank memory Mar 7, 2010 Issued
Array ( [id] => 8691558 [patent_doc_number] => 08391089 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-05 [patent_title] => 'Method and circuit of calibrating data strobe signal in memory controller' [patent_app_type] => utility [patent_app_number] => 12/718865 [patent_app_country] => US [patent_app_date] => 2010-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5741 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12718865 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/718865
Method and circuit of calibrating data strobe signal in memory controller Mar 4, 2010 Issued
Array ( [id] => 6475341 [patent_doc_number] => 20100213186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'SEMICONDUCTOR PROCESSING APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/713978 [patent_app_country] => US [patent_app_date] => 2010-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7731 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0213/20100213186.pdf [firstpage_image] =>[orig_patent_app_number] => 12713978 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/713978
Semiconductor processing apparatus Feb 25, 2010 Issued
Array ( [id] => 8797408 [patent_doc_number] => 08436277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Automatic shutoff system and method for workspace enclosure environment' [patent_app_type] => utility [patent_app_number] => 12/660198 [patent_app_country] => US [patent_app_date] => 2010-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3459 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 320 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12660198 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/660198
Automatic shutoff system and method for workspace enclosure environment Feb 22, 2010 Issued
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