Search

Amanda Lee Bailey

Examiner (ID: 3862)

Most Active Art Unit
3673
Art Unit(s)
3673
Total Applications
484
Issued Applications
252
Pending Applications
47
Abandoned Applications
193

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5489341 [patent_doc_number] => 20090290412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-26 [patent_title] => 'Memory Devices, Memory Device Constructions, Constructions, Memory Device Forming Methods, Current Conducting Devices, and Memory Cell Programming Methods' [patent_app_type] => utility [patent_app_number] => 12/125797 [patent_app_country] => US [patent_app_date] => 2008-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11229 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0290/20090290412.pdf [firstpage_image] =>[orig_patent_app_number] => 12125797 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/125797
Memory devices, memory device constructions, constructions, memory device forming methods, current conducting devices, and memory cell programming methods May 21, 2008 Issued
Array ( [id] => 7531518 [patent_doc_number] => 07843747 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-30 [patent_title] => 'System and method for better testability of OTP memory' [patent_app_type] => utility [patent_app_number] => 12/124989 [patent_app_country] => US [patent_app_date] => 2008-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1972 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/843/07843747.pdf [firstpage_image] =>[orig_patent_app_number] => 12124989 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/124989
System and method for better testability of OTP memory May 20, 2008 Issued
Array ( [id] => 4458928 [patent_doc_number] => 07894226 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-22 [patent_title] => 'Content addressable memory based on a ripple search scheme' [patent_app_type] => utility [patent_app_number] => 12/124149 [patent_app_country] => US [patent_app_date] => 2008-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6193 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/894/07894226.pdf [firstpage_image] =>[orig_patent_app_number] => 12124149 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/124149
Content addressable memory based on a ripple search scheme May 20, 2008 Issued
Array ( [id] => 16008 [patent_doc_number] => 07808819 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-05 [patent_title] => 'Method for adaptive setting of state voltage levels in non-volatile memory' [patent_app_type] => utility [patent_app_number] => 12/111729 [patent_app_country] => US [patent_app_date] => 2008-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 11467 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/808/07808819.pdf [firstpage_image] =>[orig_patent_app_number] => 12111729 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/111729
Method for adaptive setting of state voltage levels in non-volatile memory Apr 28, 2008 Issued
Array ( [id] => 85824 [patent_doc_number] => 07742354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-22 [patent_title] => 'Random access memory data resetting method' [patent_app_type] => utility [patent_app_number] => 12/110359 [patent_app_country] => US [patent_app_date] => 2008-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3606 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/742/07742354.pdf [firstpage_image] =>[orig_patent_app_number] => 12110359 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/110359
Random access memory data resetting method Apr 27, 2008 Issued
Array ( [id] => 179026 [patent_doc_number] => 07656737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-02 [patent_title] => 'Pumping circuit for multiple nonvolatile memories' [patent_app_type] => utility [patent_app_number] => 12/110435 [patent_app_country] => US [patent_app_date] => 2008-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1564 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/656/07656737.pdf [firstpage_image] =>[orig_patent_app_number] => 12110435 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/110435
Pumping circuit for multiple nonvolatile memories Apr 27, 2008 Issued
Array ( [id] => 4491908 [patent_doc_number] => 07903493 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-08 [patent_title] => 'Design structure for estimating and/or predicting power cycle length, method of estimating and/or predicting power cycle length and circuit thereof' [patent_app_type] => utility [patent_app_number] => 12/109379 [patent_app_country] => US [patent_app_date] => 2008-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3537 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/903/07903493.pdf [firstpage_image] =>[orig_patent_app_number] => 12109379 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/109379
Design structure for estimating and/or predicting power cycle length, method of estimating and/or predicting power cycle length and circuit thereof Apr 24, 2008 Issued
Array ( [id] => 4587615 [patent_doc_number] => 07835193 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-16 [patent_title] => 'Flash memory device and method of erasing flash memory device' [patent_app_type] => utility [patent_app_number] => 12/109721 [patent_app_country] => US [patent_app_date] => 2008-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4795 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/835/07835193.pdf [firstpage_image] =>[orig_patent_app_number] => 12109721 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/109721
Flash memory device and method of erasing flash memory device Apr 24, 2008 Issued
Array ( [id] => 74031 [patent_doc_number] => 07755955 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-13 [patent_title] => 'Apparatus and method for controlling data strobe signal' [patent_app_type] => utility [patent_app_number] => 12/051105 [patent_app_country] => US [patent_app_date] => 2008-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3984 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/755/07755955.pdf [firstpage_image] =>[orig_patent_app_number] => 12051105 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/051105
Apparatus and method for controlling data strobe signal Mar 18, 2008 Issued
Array ( [id] => 7531524 [patent_doc_number] => 07843753 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-30 [patent_title] => 'Integrated circuit including memory refreshed based on temperature' [patent_app_type] => utility [patent_app_number] => 12/051387 [patent_app_country] => US [patent_app_date] => 2008-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2763 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/843/07843753.pdf [firstpage_image] =>[orig_patent_app_number] => 12051387 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/051387
Integrated circuit including memory refreshed based on temperature Mar 18, 2008 Issued
Array ( [id] => 4717342 [patent_doc_number] => 20080239864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'MEMORY ACCESS CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/049421 [patent_app_country] => US [patent_app_date] => 2008-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2455 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0239/20080239864.pdf [firstpage_image] =>[orig_patent_app_number] => 12049421 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/049421
Memory access circuit Mar 16, 2008 Issued
Array ( [id] => 4674743 [patent_doc_number] => 20080212371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-04 [patent_title] => 'NON-VOLATILE MEMORY COPY BACK' [patent_app_type] => utility [patent_app_number] => 12/049942 [patent_app_country] => US [patent_app_date] => 2008-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1750 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20080212371.pdf [firstpage_image] =>[orig_patent_app_number] => 12049942 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/049942
Non-volatile memory copy back Mar 16, 2008 Issued
Array ( [id] => 66471 [patent_doc_number] => 07760562 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-20 [patent_title] => 'Address multiplexing in pseudo-dual port memory' [patent_app_type] => utility [patent_app_number] => 12/047593 [patent_app_country] => US [patent_app_date] => 2008-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4106 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/760/07760562.pdf [firstpage_image] =>[orig_patent_app_number] => 12047593 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/047593
Address multiplexing in pseudo-dual port memory Mar 12, 2008 Issued
Array ( [id] => 7531514 [patent_doc_number] => 07843743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-30 [patent_title] => 'Data output circuit for semiconductor memory apparatus' [patent_app_type] => utility [patent_app_number] => 12/047793 [patent_app_country] => US [patent_app_date] => 2008-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 10343 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/843/07843743.pdf [firstpage_image] =>[orig_patent_app_number] => 12047793 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/047793
Data output circuit for semiconductor memory apparatus Mar 12, 2008 Issued
Array ( [id] => 178982 [patent_doc_number] => 07656693 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-02 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 12/047537 [patent_app_country] => US [patent_app_date] => 2008-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 8149 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/656/07656693.pdf [firstpage_image] =>[orig_patent_app_number] => 12047537 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/047537
Semiconductor device and manufacturing method thereof Mar 12, 2008 Issued
Array ( [id] => 279037 [patent_doc_number] => 07558119 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-07 [patent_title] => 'Operating method of P-channel non-volatile memory' [patent_app_type] => utility [patent_app_number] => 12/046477 [patent_app_country] => US [patent_app_date] => 2008-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4663 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/558/07558119.pdf [firstpage_image] =>[orig_patent_app_number] => 12046477 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/046477
Operating method of P-channel non-volatile memory Mar 11, 2008 Issued
Array ( [id] => 5535230 [patent_doc_number] => 20090235018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-17 [patent_title] => 'Increased Magnetic Damping for Toggle MRAM' [patent_app_type] => utility [patent_app_number] => 12/046519 [patent_app_country] => US [patent_app_date] => 2008-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4463 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20090235018.pdf [firstpage_image] =>[orig_patent_app_number] => 12046519 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/046519
Increased magnetic damping for toggle MRAM Mar 11, 2008 Issued
Array ( [id] => 6469947 [patent_doc_number] => 20100091535 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-15 [patent_title] => 'ADAPTIVE ESTIMATION OF MEMORY CELL READ THRESHOLDS' [patent_app_type] => utility [patent_app_number] => 12/522175 [patent_app_country] => US [patent_app_date] => 2008-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12699 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20100091535.pdf [firstpage_image] =>[orig_patent_app_number] => 12522175 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/522175
Adaptive estimation of memory cell read thresholds Mar 10, 2008 Issued
Array ( [id] => 4750937 [patent_doc_number] => 20080159008 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'OPERATING METHOD OF P-CHANNEL NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/045030 [patent_app_country] => US [patent_app_date] => 2008-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4663 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20080159008.pdf [firstpage_image] =>[orig_patent_app_number] => 12045030 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/045030
OPERATING METHOD OF P-CHANNEL NON-VOLATILE MEMORY Mar 9, 2008 Abandoned
Array ( [id] => 4878285 [patent_doc_number] => 20080151668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/044437 [patent_app_country] => US [patent_app_date] => 2008-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 22246 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0151/20080151668.pdf [firstpage_image] =>[orig_patent_app_number] => 12044437 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/044437
Semiconductor integrated circuit Mar 6, 2008 Issued
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