Search

Amanda Lee Bailey

Examiner (ID: 3862)

Most Active Art Unit
3673
Art Unit(s)
3673
Total Applications
484
Issued Applications
252
Pending Applications
47
Abandoned Applications
193

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 45019 [patent_doc_number] => 07782688 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-24 [patent_title] => 'Semiconductor memory device and test method thereof' [patent_app_type] => utility [patent_app_number] => 12/004715 [patent_app_country] => US [patent_app_date] => 2007-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9082 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/782/07782688.pdf [firstpage_image] =>[orig_patent_app_number] => 12004715 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/004715
Semiconductor memory device and test method thereof Dec 20, 2007 Issued
Array ( [id] => 94592 [patent_doc_number] => 07733680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-08 [patent_title] => 'Non-volatile memory module for preventing system failure and system including the same' [patent_app_type] => utility [patent_app_number] => 11/962435 [patent_app_country] => US [patent_app_date] => 2007-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4343 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/733/07733680.pdf [firstpage_image] =>[orig_patent_app_number] => 11962435 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/962435
Non-volatile memory module for preventing system failure and system including the same Dec 20, 2007 Issued
Array ( [id] => 56318 [patent_doc_number] => 07768822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-03 [patent_title] => 'Compensation circuit and memory with the same' [patent_app_type] => utility [patent_app_number] => 12/000981 [patent_app_country] => US [patent_app_date] => 2007-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2612 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/768/07768822.pdf [firstpage_image] =>[orig_patent_app_number] => 12000981 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/000981
Compensation circuit and memory with the same Dec 18, 2007 Issued
Array ( [id] => 4700258 [patent_doc_number] => 20080222442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-11 [patent_title] => 'CIRCUIT FOR GENERATING OUTPUT ENABLE SIGNAL IN SEMICONDUCTOR MEMORY APPARATUS' [patent_app_type] => utility [patent_app_number] => 11/959269 [patent_app_country] => US [patent_app_date] => 2007-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3528 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20080222442.pdf [firstpage_image] =>[orig_patent_app_number] => 11959269 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/959269
Circuit for generating output enable signal in semiconductor memory apparatus Dec 17, 2007 Issued
Array ( [id] => 6239337 [patent_doc_number] => 20100133248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-03 [patent_title] => 'METHOD AND DEVICE FOR QUALITY CONTROL OF A WELD BEAD' [patent_app_type] => utility [patent_app_number] => 12/520379 [patent_app_country] => US [patent_app_date] => 2007-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3172 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0133/20100133248.pdf [firstpage_image] =>[orig_patent_app_number] => 12520379 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/520379
Method and device for quality control of a weld bead Dec 13, 2007 Issued
Array ( [id] => 26194 [patent_doc_number] => 07796451 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-14 [patent_title] => 'Integrated circuits and methods to compensate for defective memory in multiple layers of memory' [patent_app_type] => utility [patent_app_number] => 12/001335 [patent_app_country] => US [patent_app_date] => 2007-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6653 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/796/07796451.pdf [firstpage_image] =>[orig_patent_app_number] => 12001335 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/001335
Integrated circuits and methods to compensate for defective memory in multiple layers of memory Dec 9, 2007 Issued
Array ( [id] => 4914305 [patent_doc_number] => 20080094905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'Nonvolatile Memory' [patent_app_type] => utility [patent_app_number] => 11/952693 [patent_app_country] => US [patent_app_date] => 2007-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 65 [patent_figures_cnt] => 65 [patent_no_of_words] => 15091 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20080094905.pdf [firstpage_image] =>[orig_patent_app_number] => 11952693 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/952693
Nonvolatile memory Dec 6, 2007 Issued
Array ( [id] => 229816 [patent_doc_number] => 07602633 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-13 [patent_title] => 'Non-volatile memory device, method of manufacturing the same, and method of operating the same' [patent_app_type] => utility [patent_app_number] => 11/946737 [patent_app_country] => US [patent_app_date] => 2007-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 7694 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/602/07602633.pdf [firstpage_image] =>[orig_patent_app_number] => 11946737 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/946737
Non-volatile memory device, method of manufacturing the same, and method of operating the same Nov 27, 2007 Issued
Array ( [id] => 4829792 [patent_doc_number] => 20080126686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-29 [patent_title] => 'MEMORY POWER AND PERFORMANCE MANAGEMENT' [patent_app_type] => utility [patent_app_number] => 11/945575 [patent_app_country] => US [patent_app_date] => 2007-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4608 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20080126686.pdf [firstpage_image] =>[orig_patent_app_number] => 11945575 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/945575
Memory power and performance management Nov 26, 2007 Issued
Array ( [id] => 4782637 [patent_doc_number] => 20080135966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-12 [patent_title] => 'SMART CARD CAPABLE OF SENSING LIGHT' [patent_app_type] => utility [patent_app_number] => 11/945502 [patent_app_country] => US [patent_app_date] => 2007-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4349 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20080135966.pdf [firstpage_image] =>[orig_patent_app_number] => 11945502 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/945502
Smart card capable of sensing light Nov 26, 2007 Issued
Array ( [id] => 4537784 [patent_doc_number] => 07924640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-12 [patent_title] => 'Method for memory cell characterization using universal structure' [patent_app_type] => utility [patent_app_number] => 11/945469 [patent_app_country] => US [patent_app_date] => 2007-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 52 [patent_no_of_words] => 9560 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/924/07924640.pdf [firstpage_image] =>[orig_patent_app_number] => 11945469 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/945469
Method for memory cell characterization using universal structure Nov 26, 2007 Issued
Array ( [id] => 6470349 [patent_doc_number] => 20100091572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-15 [patent_title] => '2T NOR-TYPE NON-VOLATILE MEMORYT CELL ARRAY AND METHOD OF PROCESSING DATA OF 2T NOR-TYPE NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 12/520573 [patent_app_country] => US [patent_app_date] => 2007-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4758 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0091/20100091572.pdf [firstpage_image] =>[orig_patent_app_number] => 12520573 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/520573
2T NOR-TYPE NON-VOLATILE MEMORYT CELL ARRAY AND METHOD OF PROCESSING DATA OF 2T NOR-TYPE NON-VOLATILE MEMORY Nov 20, 2007 Abandoned
Array ( [id] => 6368092 [patent_doc_number] => 20100080037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/517025 [patent_app_country] => US [patent_app_date] => 2007-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 25590 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20100080037.pdf [firstpage_image] =>[orig_patent_app_number] => 12517025 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/517025
Nonvolatile semiconductor memory device Nov 4, 2007 Issued
Array ( [id] => 233802 [patent_doc_number] => 07599235 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-06 [patent_title] => 'Memory correction system and method' [patent_app_type] => utility [patent_app_number] => 11/982532 [patent_app_country] => US [patent_app_date] => 2007-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4156 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/599/07599235.pdf [firstpage_image] =>[orig_patent_app_number] => 11982532 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/982532
Memory correction system and method Nov 1, 2007 Issued
Array ( [id] => 4691963 [patent_doc_number] => 20080084733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-10 [patent_title] => 'BACK-GATE CONTROLLED ASYMMETRICAL MEMORY CELL AND MEMORY USING THE CELL' [patent_app_type] => utility [patent_app_number] => 11/933505 [patent_app_country] => US [patent_app_date] => 2007-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4734 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20080084733.pdf [firstpage_image] =>[orig_patent_app_number] => 11933505 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/933505
Computer-readable medium encoding a memory using a back-gate controlled asymmetrical memory cell Oct 31, 2007 Issued
Array ( [id] => 4668451 [patent_doc_number] => 20080043511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'AUTONOMOUS ANTIFUSE CELL' [patent_app_type] => utility [patent_app_number] => 11/923434 [patent_app_country] => US [patent_app_date] => 2007-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6288 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20080043511.pdf [firstpage_image] =>[orig_patent_app_number] => 11923434 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/923434
Autonomous antifuse cell Oct 23, 2007 Issued
Array ( [id] => 4668498 [patent_doc_number] => 20080043558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'Securing An Integrated Circuit' [patent_app_type] => utility [patent_app_number] => 11/875971 [patent_app_country] => US [patent_app_date] => 2007-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5494 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20080043558.pdf [firstpage_image] =>[orig_patent_app_number] => 11875971 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/875971
Securing an integrated circuit Oct 21, 2007 Issued
Array ( [id] => 261022 [patent_doc_number] => 07573753 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-11 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/875633 [patent_app_country] => US [patent_app_date] => 2007-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 12596 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 350 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/573/07573753.pdf [firstpage_image] =>[orig_patent_app_number] => 11875633 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/875633
Semiconductor device Oct 18, 2007 Issued
Array ( [id] => 206395 [patent_doc_number] => 07630250 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-08 [patent_title] => 'Controlled ramp rates for metal bitlines during write operations from high voltage driver for memory applications' [patent_app_type] => utility [patent_app_number] => 11/872989 [patent_app_country] => US [patent_app_date] => 2007-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 10033 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/630/07630250.pdf [firstpage_image] =>[orig_patent_app_number] => 11872989 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/872989
Controlled ramp rates for metal bitlines during write operations from high voltage driver for memory applications Oct 15, 2007 Issued
Array ( [id] => 5283673 [patent_doc_number] => 20090097347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-16 [patent_title] => 'SENSE-AMPLIFIER CIRCUIT FOR A MEMORY DEVICE WITH AN OPEN BIT LINE ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 11/872573 [patent_app_country] => US [patent_app_date] => 2007-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5951 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20090097347.pdf [firstpage_image] =>[orig_patent_app_number] => 11872573 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/872573
Sense-amplifier circuit for a memory device with an open bit line architecture Oct 14, 2007 Issued
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